Commit f2743ae3 authored by Chukun Pan's avatar Chukun Pan Committed by Bjorn Andersson
Browse files

clk: qcom: gcc-ipq6018: update sdcc max clock frequency 



The mmc controller of the IPQ6018 does not support HS400 mode.
So adjust the maximum clock frequency of sdcc to 200 MHz (HS200).

Signed-off-by: default avatarChukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240620150122.1406631-2-amadeus@jmu.edu.cn


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 03675e39

drivers/clk/qcom/gcc-ipq6018.c

+1 −1
Original line number Diff line number Diff line
@@ -1617,7 +1617,7 @@ static const struct freq_tbl ftbl_sdcc_apps_clk_src[] = { 
	F(96000000, P_GPLL2, 12, 0, 0),

	F(177777778, P_GPLL0, 4.5, 0, 0),

	F(192000000, P_GPLL2, 6, 0, 0),

	F(384000000, P_GPLL2, 3, 0, 0),

	F(200000000, P_GPLL0, 4, 0, 0),

	{ }

};