Commit f2f3a4af authored by Ian Rogers's avatar Ian Rogers Committed by Namhyung Kim
Browse files

perf vendor events: Update SkylakeX events/metrics 

Update events from v1.35 to v1.36.
Update TMA metrics from 4.8 to 5.02.

Bring in the event updates v1.36:
https://github.com/intel/perfmon/commit/f6801e5c145406f355f40e1746f836eaa1426cf9

The TMA 5.02 addition is from (with subsequent fixes):
https://github.com/intel/perfmon/commit/1d72913b2d938781fb28f3cc3507aaec5c22d782



Co-developed-by: default avatarCaleb Biggers <caleb.biggers@intel.com>
Signed-off-by: default avatarCaleb Biggers <caleb.biggers@intel.com>
Acked-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarIan Rogers <irogers@google.com>
Tested-by: default avatarThomas Falcon <thomas.falcon@intel.com>
Link: https://lore.kernel.org/r/20250211213031.114209-23-irogers@google.com


Signed-off-by: default avatarNamhyung Kim <namhyung@kernel.org>
parent 228c556a

tools/perf/pmu-events/arch/x86/mapfile.csv

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ GenuineIntel-6-8F,v1.25,sapphirerapids,core 
GenuineIntel-6-AF,v1.08,sierraforest,core

GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core

GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v59,skylake,core

GenuineIntel-6-55-[01234],v1.35,skylakex,core

GenuineIntel-6-55-[01234],v1.36,skylakex,core

GenuineIntel-6-86,v1.23,snowridgex,core

GenuineIntel-6-8[CD],v1.16,tigerlake,core

GenuineIntel-6-2C,v5,westmereep-dp,core

tools/perf/pmu-events/arch/x86/skylakex/metricgroups.json

+8 −1
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ 
    "IoBW": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "L2Evicts": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "LSD": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "LockCont": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "MachineClears": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "Machine_Clears": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "Mem": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
@@ -84,7 +85,9 @@ 
    "tma_bad_speculation_group": "Metrics contributing to tma_bad_speculation category",

    "tma_branch_mispredicts_group": "Metrics contributing to tma_branch_mispredicts category",

    "tma_branch_resteers_group": "Metrics contributing to tma_branch_resteers category",

    "tma_code_stlb_miss_group": "Metrics contributing to tma_code_stlb_miss category",

    "tma_core_bound_group": "Metrics contributing to tma_core_bound category",

    "tma_divider_group": "Metrics contributing to tma_divider category",

    "tma_dram_bound_group": "Metrics contributing to tma_dram_bound category",

    "tma_dtlb_load_group": "Metrics contributing to tma_dtlb_load category",

    "tma_dtlb_store_group": "Metrics contributing to tma_dtlb_store category",
@@ -113,10 +116,13 @@ 
    "tma_issueSpSt": "Metrics related by the issue $issueSpSt",

    "tma_issueSyncxn": "Metrics related by the issue $issueSyncxn",

    "tma_issueTLB": "Metrics related by the issue $issueTLB",

    "tma_itlb_misses_group": "Metrics contributing to tma_itlb_misses category",

    "tma_l1_bound_group": "Metrics contributing to tma_l1_bound category",

    "tma_l2_bound_group": "Metrics contributing to tma_l2_bound category",

    "tma_l3_bound_group": "Metrics contributing to tma_l3_bound category",

    "tma_light_operations_group": "Metrics contributing to tma_light_operations category",

    "tma_load_op_utilization_group": "Metrics contributing to tma_load_op_utilization category",

    "tma_load_stlb_miss_group": "Metrics contributing to tma_load_stlb_miss category",

    "tma_machine_clears_group": "Metrics contributing to tma_machine_clears category",

    "tma_mem_latency_group": "Metrics contributing to tma_mem_latency category",

    "tma_memory_bound_group": "Metrics contributing to tma_memory_bound category",
@@ -129,5 +135,6 @@ 
    "tma_retiring_group": "Metrics contributing to tma_retiring category",

    "tma_serializing_operation_group": "Metrics contributing to tma_serializing_operation category",

    "tma_store_bound_group": "Metrics contributing to tma_store_bound category",

    "tma_store_op_utilization_group": "Metrics contributing to tma_store_op_utilization category"

    "tma_store_op_utilization_group": "Metrics contributing to tma_store_op_utilization category",

    "tma_store_stlb_miss_group": "Metrics contributing to tma_store_stlb_miss category"

}

tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json

+426 −314

File changed.

Preview size limit exceeded, changes collapsed.

tools/perf/pmu-events/arch/x86/skylakex/uncore-cache.json

+30 −30
Original line number Diff line number Diff line
@@ -4454,7 +4454,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD",

        "Filter": "config1=0x4023300000000",

        "Filter": "config1=0x40233",

        "PerPkg": "1",

        "PublicDescription": "TOR Inserts : CRds issued by iA Cores that Hit the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.   Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x11",
@@ -4465,7 +4465,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD",

        "Filter": "config1=0x4043300000000",

        "Filter": "config1=0x40433",

        "PerPkg": "1",

        "PublicDescription": "TOR Inserts : DRds issued by iA Cores that Hit the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.   Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x11",
@@ -4476,7 +4476,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD",

        "Filter": "config1=0x4b23300000000",

        "Filter": "config1=0x4b233",

        "PerPkg": "1",

        "UMask": "0x11",

        "Unit": "CHA"
@@ -4486,7 +4486,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD",

        "Filter": "config1=0x4b43300000000",

        "Filter": "config1=0x4b433",

        "PerPkg": "1",

        "UMask": "0x11",

        "Unit": "CHA"
@@ -4496,7 +4496,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefRFO",

        "Filter": "config1=0x4b03300000000",

        "Filter": "config1=0x4b033",

        "PerPkg": "1",

        "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores that hit the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.   Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x11",
@@ -4507,7 +4507,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO",

        "Filter": "config1=0x4003300000000",

        "Filter": "config1=0x40033",

        "PerPkg": "1",

        "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that Hit the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.   Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x11",
@@ -4528,7 +4528,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD",

        "Filter": "config1=0x4023300000000",

        "Filter": "config1=0x40233",

        "PerPkg": "1",

        "PublicDescription": "TOR Inserts : CRds issued by iA Cores that Missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.   Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x21",
@@ -4539,7 +4539,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD",

        "Filter": "config1=0x4043300000000",

        "Filter": "config1=0x40433",

        "PerPkg": "1",

        "PublicDescription": "TOR Inserts : DRds issued by iA Cores that Missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.   Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x21",
@@ -4550,7 +4550,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD",

        "Filter": "config1=0x4b23300000000",

        "Filter": "config1=0x4b233",

        "PerPkg": "1",

        "UMask": "0x21",

        "Unit": "CHA"
@@ -4560,7 +4560,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD",

        "Filter": "config1=0x4b43300000000",

        "Filter": "config1=0x4b433",

        "PerPkg": "1",

        "UMask": "0x21",

        "Unit": "CHA"
@@ -4570,7 +4570,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefRFO",

        "Filter": "config1=0x4b03300000000",

        "Filter": "config1=0x4b033",

        "PerPkg": "1",

        "PublicDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores that missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.   Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x21",
@@ -4581,7 +4581,7 @@ 
        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO",

        "Filter": "config1=0x4003300000000",

        "Filter": "config1=0x40033",

        "PerPkg": "1",

        "PublicDescription": "TOR Inserts : RFOs issued by iA Cores that Missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.   Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x21",
@@ -4624,7 +4624,7 @@ 
        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM",

        "Experimental": "1",

        "Filter": "config1=0x4903300000000",

        "Filter": "config1=0x49033",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of entries successfully inserted into the TOR that are generated from local IO ItoM requests that miss the LLC. An ItoM request is used by IIO to request a data write without first reading the data for ownership.",

        "UMask": "0x24",
@@ -4636,7 +4636,7 @@ 
        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RDCUR",

        "Experimental": "1",

        "Filter": "config1=0x43c3300000000",

        "Filter": "config1=0x43C33",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of entries successfully inserted into the TOR that are generated from local IO RdCur requests and miss the LLC. A RdCur request is used by IIO to read data without changing state.",

        "UMask": "0x24",
@@ -4648,7 +4648,7 @@ 
        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO",

        "Experimental": "1",

        "Filter": "config1=0x4003300000000",

        "Filter": "config1=0x40033",

        "PerPkg": "1",

        "PublicDescription": "Counts the number of entries successfully inserted into the TOR that are generated from local IO RFO requests that miss the LLC. A read for ownership (RFO) requests a cache line to be cached in E state with the intent to modify.",

        "UMask": "0x24",
@@ -4865,7 +4865,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD",

        "Filter": "config1=0x4023300000000",

        "Filter": "config1=0x40233",

        "PerPkg": "1",

        "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that Hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.     Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x11",
@@ -4876,7 +4876,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD",

        "Filter": "config1=0x4043300000000",

        "Filter": "config1=0x40433",

        "PerPkg": "1",

        "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that Hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.     Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x11",
@@ -4887,7 +4887,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD",

        "Filter": "config1=0x4b23300000000",

        "Filter": "config1=0x4b233",

        "PerPkg": "1",

        "UMask": "0x11",

        "Unit": "CHA"
@@ -4897,7 +4897,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD",

        "Filter": "config1=0x4b43300000000",

        "Filter": "config1=0x4b433",

        "PerPkg": "1",

        "UMask": "0x11",

        "Unit": "CHA"
@@ -4907,7 +4907,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefRFO",

        "Filter": "config1=0x4b03300000000",

        "Filter": "config1=0x4b033",

        "PerPkg": "1",

        "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores that hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.     Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x11",
@@ -4918,7 +4918,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO",

        "Filter": "config1=0x4003300000000",

        "Filter": "config1=0x40033",

        "PerPkg": "1",

        "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that Hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.     Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x11",
@@ -4939,7 +4939,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD",

        "Filter": "config1=0x4023300000000",

        "Filter": "config1=0x40233",

        "PerPkg": "1",

        "PublicDescription": "TOR Occupancy : CRds issued by iA Cores that Missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.     Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x21",
@@ -4950,7 +4950,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD",

        "Filter": "config1=0x4043300000000",

        "Filter": "config1=0x40433",

        "PerPkg": "1",

        "PublicDescription": "TOR Occupancy : DRds issued by iA Cores that Missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.     Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x21",
@@ -4961,7 +4961,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD",

        "Filter": "config1=0x4b23300000000",

        "Filter": "config1=0x4b233",

        "PerPkg": "1",

        "UMask": "0x21",

        "Unit": "CHA"
@@ -4971,7 +4971,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD",

        "Filter": "config1=0x4b43300000000",

        "Filter": "config1=0x4b433",

        "PerPkg": "1",

        "UMask": "0x21",

        "Unit": "CHA"
@@ -4981,7 +4981,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefRFO",

        "Filter": "config1=0x4b03300000000",

        "Filter": "config1=0x4b033",

        "PerPkg": "1",

        "PublicDescription": "TOR Occupancy : LLCPrefRFO issued by iA Cores that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.     Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x21",
@@ -4992,7 +4992,7 @@ 
        "Counter": "0",

        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO",

        "Filter": "config1=0x4003300000000",

        "Filter": "config1=0x40033",

        "PerPkg": "1",

        "PublicDescription": "TOR Occupancy : RFOs issued by iA Cores that Missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.     Does not include addressless requests such as locks and interrupts.",

        "UMask": "0x21",
@@ -5037,7 +5037,7 @@ 
        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM",

        "Experimental": "1",

        "Filter": "config1=0x4903300000000",

        "Filter": "config1=0x49033",

        "PerPkg": "1",

        "PublicDescription": "For each cycle, this event accumulates the number of valid entries in the TOR that are generated from local IO ItoM requests that miss the LLC. An ItoM is used by IIO to request a data write without first reading the data for ownership.",

        "UMask": "0x24",
@@ -5049,7 +5049,7 @@ 
        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RDCUR",

        "Experimental": "1",

        "Filter": "config1=0x43c3300000000",

        "Filter": "config1=0x43C33",

        "PerPkg": "1",

        "PublicDescription": "For each cycle, this event accumulates the number of valid entries in the TOR that are generated from local IO RdCur requests that miss the LLC. A RdCur request is used by IIO to read data without changing state.",

        "UMask": "0x24",
@@ -5061,7 +5061,7 @@ 
        "EventCode": "0x36",

        "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO",

        "Experimental": "1",

        "Filter": "config1=0x4003300000000",

        "Filter": "config1=0x40033",

        "PerPkg": "1",

        "PublicDescription": "For each cycle, this event accumulates the number of valid entries in the TOR that are generated from local IO RFO requests that miss the LLC. A read for ownership (RFO) requests data to be cached in E state with the intent to modify.",

        "UMask": "0x24",

tools/perf/pmu-events/arch/x86/skylakex/uncore-interconnect.json

+0 −11
Original line number Diff line number Diff line
@@ -13754,16 +13754,5 @@ 
        "PerPkg": "1",

        "PublicDescription": "Number outstanding register requests within message channel tracker",

        "Unit": "UBOX"

    },

    {

        "BriefDescription": "UPI interconnect send bandwidth for payload. Derived from unc_upi_txl_flits.all_data",

        "Counter": "0,1,2,3",

        "EventCode": "0x2",

        "EventName": "UPI_DATA_BANDWIDTH_TX",

        "PerPkg": "1",

        "PublicDescription": "Counts valid data FLITs (80 bit FLow control unITs: 64bits of data) transmitted (TxL) via any of the 3 Intel(R) Ultra Path Interconnect (UPI) slots on this UPI unit.",

        "ScaleUnit": "7.11E-06Bytes",

        "UMask": "0xf",

        "Unit": "UPI"

    }

]