Unverified Commit f352a28c authored by Palmer Dabbelt's avatar Palmer Dabbelt
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Merge patch series "riscv: report more ISA extensions through hwprobe"

Clément Léger <cleger@rivosinc.com> says:

In order to be able to gather more information about the supported ISA
extensions from userspace using the hwprobe syscall, add more ISA
extensions report. This series adds the following ISA extensions parsing
support:

- Zfh[min]
- Zvfh[min]
- Zihintntl
- Zbc
- Zvbb
- Zvbc
- Zvkb
- Zvkg
- Zvkned
- Zvknh[ab]
- Zvksed
- Zvksh
- Zvkn
- Zvknc
- Zvkng
- Zvks
- Zvksc
- Zvksg
- Zvkt
- Zfa
- Zbkb
- Zbkc
- Zbkx
- Zknd
- Zkne
- Zknh
- Zkr
- Zksed
- Zksh
- Zkt

Some of these extensions are actually shorthands for other "sub"
extensions. This series includes a patch from Conor/Evan that adds a way
to specify such "bundled" extensions. When exposing these bundled
extensions to userspace through hwprobe, only the "sub" extensions are
exposed.

In order to test it, one can use qemu and the small hwprobe utility
provided[1]. Run qemu by specifying additional ISA extensions, for
instance:

$ qemu-system-riscv64 -cpu rv64,v=true,zk=true,zvksh=true,zvkned=true
  <whatever options you want>

Then, run hwprobe:

$ ./hwprobe
Base system ISA:
 - IMA_FD
 - C
 - V
Supported extensions:
 - Zba
 - Zbb
 - Zbs
 - Zbc
 - Zbkb
 - Zbkc
 - Zbkx
 - Zknd
 - Zkne
 - Zknh
 - Zkt
 - Zvkned
 - Zvksh
 - Zihintntl
 - Zfa

* b4-shazam-merge:
  dt-bindings: riscv: add Zfa ISA extension description
  riscv: hwprobe: export Zfa ISA extension
  riscv: add ISA extension parsing for Zfa
  dt-bindings: riscv: add Zvfh[min] ISA extension description
  riscv: hwprobe: export Zvfh[min] ISA extensions
  riscv: add ISA extension parsing for Zvfh[min]
  dt-bindings: riscv: add Zihintntl ISA extension description
  riscv: hwprobe: export Zhintntl ISA extension
  riscv: add ISA extension parsing for Zihintntl
  dt-bindings: riscv: add Zfh[min] ISA extensions description
  riscv: hwprobe: export Zfh[min] ISA extensions
  riscv: add ISA extension parsing for Zfh/Zfh[min]
  dt-bindings: riscv: add vector crypto ISA extensions description
  riscv: hwprobe: export vector crypto ISA extensions
  riscv: add ISA extension parsing for vector crypto
  dt-bindings: riscv: add scalar crypto ISA extensions description
  riscv: hwprobe: add support for scalar crypto ISA extensions
  riscv: add ISA extension parsing for scalar crypto
  riscv: hwprobe: export missing Zbc ISA extension
  riscv: add ISA extension parsing for Zbc

Link: https://lore.kernel.org/r/20231114141256.126749-1-cleger@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parents b85ea95d 9726acfd
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+81 −0
Original line number Diff line number Diff line
@@ -80,6 +80,87 @@ The following keys are defined:
  * :c:macro:`RISCV_HWPROBE_EXT_ZICBOZ`: The Zicboz extension is supported, as
       ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.

  * :c:macro:`RISCV_HWPROBE_EXT_ZBC` The Zbc extension is supported, as defined
       in version 1.0 of the Bit-Manipulation ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZBKB` The Zbkb extension is supported, as
       defined in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZBKC` The Zbkc extension is supported, as
       defined in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZBKX` The Zbkx extension is supported, as
       defined in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZKND` The Zknd extension is supported, as
       defined in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZKNE` The Zkne extension is supported, as
       defined in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZKNH` The Zknh extension is supported, as
       defined in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZKSED` The Zksed extension is supported, as
       defined in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZKSH` The Zksh extension is supported, as
       defined in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZKT` The Zkt extension is supported, as defined
       in version 1.0 of the Scalar Crypto ISA extensions.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVBB`: The Zvbb extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVBC`: The Zvbc extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVKB`: The Zvkb extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVKG`: The Zvkg extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVKNED`: The Zvkned extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHA`: The Zvknha extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHB`: The Zvknhb extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVKSED`: The Zvksed extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVKSH`: The Zvksh extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVKT`: The Zvkt extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZFH`: The Zfh extension version 1.0 is supported
       as defined in the RISC-V ISA manual.

  * :c:macro:`RISCV_HWPROBE_EXT_ZFHMIN`: The Zfhmin extension version 1.0 is
       supported as defined in the RISC-V ISA manual.

  * :c:macro:`RISCV_HWPROBE_EXT_ZIHINTNTL`: The Zihintntl extension version 1.0
       is supported as defined in the RISC-V ISA manual.

  * :c:macro:`RISCV_HWPROBE_EXT_ZVFH`: The Zvfh extension is supported as
       defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
       ("Remove draft warnings from Zvfh[min]").

  * :c:macro:`RISCV_HWPROBE_EXT_ZVFHMIN`: The Zvfhmin extension is supported as
       defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
       ("Remove draft warnings from Zvfh[min]").

  * :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as
       defined in the RISC-V ISA manual starting from commit 056b6ff467c7
       ("Zfa is ratified").

* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
  information about the selected set of processors.

+213 −0
Original line number Diff line number Diff line
@@ -190,12 +190,111 @@ properties:
            multiplication as ratified at commit 6d33919 ("Merge pull request
            #158 from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.

        - const: zbkb
          description:
            The standard Zbkb bitmanip instructions for cryptography as ratified
            in version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zbkc
          description:
            The standard Zbkc carry-less multiply instructions as ratified
            in version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zbkx
          description:
            The standard Zbkx crossbar permutation instructions as ratified
            in version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zbs
          description: |
            The standard Zbs bit-manipulation extension for single-bit
            instructions as ratified at commit 6d33919 ("Merge pull request #158
            from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.

        - const: zfa
          description:
            The standard Zfa extension for additional floating point
            instructions, as ratified in commit 056b6ff ("Zfa is ratified") of
            riscv-isa-manual.

        - const: zfh
          description:
            The standard Zfh extension for 16-bit half-precision binary
            floating-point instructions, as ratified in commit 64074bc ("Update
            version numbers for Zfh/Zfinx") of riscv-isa-manual.

        - const: zfhmin
          description:
            The standard Zfhmin extension which provides minimal support for
            16-bit half-precision binary floating-point instructions, as ratified
            in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
            riscv-isa-manual.

        - const: zk
          description:
            The standard Zk Standard Scalar cryptography extension as ratified
            in version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zkn
          description:
            The standard Zkn NIST algorithm suite extensions as ratified in
            version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zknd
          description: |
            The standard Zknd for NIST suite: AES decryption instructions as
            ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zkne
          description: |
            The standard Zkne for NIST suite: AES encryption instructions as
            ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zknh
          description: |
            The standard Zknh for NIST suite: hash function instructions as
            ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zkr
          description:
            The standard Zkr entropy source extension as ratified in version
            1.0 of RISC-V Cryptography Extensions Volume I specification.
            This string being present means that the CSR associated to this
            extension is accessible at the privilege level to which that
            device-tree has been provided.

        - const: zks
          description:
            The standard Zks ShangMi algorithm suite extensions as ratified in
            version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zksed
          description: |
            The standard Zksed for ShangMi suite: SM4 block cipher instructions
            as ratified in version 1.0 of RISC-V Cryptography Extensions
            Volume I specification.

        - const: zksh
          description: |
            The standard Zksh for ShangMi suite: SM3 hash function instructions
            as ratified in version 1.0 of RISC-V Cryptography Extensions
            Volume I specification.

        - const: zkt
          description:
            The standard Zkt for data independent execution latency as ratified
            in version 1.0 of RISC-V Cryptography Extensions Volume I
            specification.

        - const: zicbom
          description:
            The standard Zicbom extension for base cache management operations as
@@ -246,6 +345,12 @@ properties:
            The standard Zihintpause extension for pause hints, as ratified in
            commit d8ab5c7 ("Zihintpause is ratified") of the riscv-isa-manual.

        - const: zihintntl
          description:
            The standard Zihintntl extension for non-temporal locality hints, as
            ratified in commit 0dc91f5 ("Zihintntl is ratified") of the
            riscv-isa-manual.

        - const: zihpm
          description:
            The standard Zihpm extension for hardware performance counters, as
@@ -258,5 +363,113 @@ properties:
            in commit 2e5236 ("Ztso is now ratified.") of the
            riscv-isa-manual.

        - const: zvbb
          description:
            The standard Zvbb extension for vectored basic bit-manipulation
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvbc
          description:
            The standard Zvbc extension for vectored carryless multiplication
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvfh
          description:
            The standard Zvfh extension for vectored half-precision
            floating-point instructions, as ratified in commit e2ccd05
            ("Remove draft warnings from Zvfh[min]") of riscv-v-spec.

        - const: zvfhmin
          description:
            The standard Zvfhmin extension for vectored minimal half-precision
            floating-point instructions, as ratified in commit e2ccd05
            ("Remove draft warnings from Zvfh[min]") of riscv-v-spec.

        - const: zvkb
          description:
            The standard Zvkb extension for vector cryptography bit-manipulation
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvkg
          description:
            The standard Zvkg extension for vector GCM/GMAC instructions, as
            ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc")
            of riscv-crypto.

        - const: zvkn
          description:
            The standard Zvkn extension for NIST algorithm suite instructions, as
            ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc")
            of riscv-crypto.

        - const: zvknc
          description:
            The standard Zvknc extension for NIST algorithm suite with carryless
            multiply instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvkned
          description:
            The standard Zvkned extension for Vector AES block cipher
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvkng
          description:
            The standard Zvkng extension for NIST algorithm suite with GCM
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvknha
          description: |
            The standard Zvknha extension for NIST suite: vector SHA-2 secure,
            hash (SHA-256 only) instructions, as ratified in commit
            56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvknhb
          description: |
            The standard Zvknhb extension for NIST suite: vector SHA-2 secure,
            hash (SHA-256 and SHA-512) instructions, as ratified in commit
            56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvks
          description:
            The standard Zvks extension for ShangMi algorithm suite
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvksc
          description:
            The standard Zvksc extension for ShangMi algorithm suite with
            carryless multiplication instructions, as ratified in commit 56ed795
            ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvksed
          description: |
            The standard Zvksed extension for ShangMi suite: SM4 block cipher
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvksh
          description: |
            The standard Zvksh extension for ShangMi suite: SM3 secure hash
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvksg
          description:
            The standard Zvksg extension for ShangMi algorithm suite with GCM
            instructions, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

        - const: zvkt
          description:
            The standard Zvkt extension for vector data-independent execution
            latency, as ratified in commit 56ed795 ("Update
            riscv-crypto-spec-vector.adoc") of riscv-crypto.

additionalProperties: true
...
+3 −1
Original line number Diff line number Diff line
@@ -59,6 +59,8 @@ struct riscv_isa_ext_data {
	const unsigned int id;
	const char *name;
	const char *property;
	const unsigned int *subset_ext_ids;
	const unsigned int subset_ext_size;
};

extern const struct riscv_isa_ext_data riscv_isa_ext[];
@@ -67,7 +69,7 @@ extern bool riscv_isa_fallback;

unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);

bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit);
bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);
#define riscv_isa_extension_available(isa_bitmap, ext)	\
	__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)

+29 −1
Original line number Diff line number Diff line
@@ -57,8 +57,36 @@
#define RISCV_ISA_EXT_ZIHPM		42
#define RISCV_ISA_EXT_SMSTATEEN		43
#define RISCV_ISA_EXT_ZICOND		44
#define RISCV_ISA_EXT_ZBC		45
#define RISCV_ISA_EXT_ZBKB		46
#define RISCV_ISA_EXT_ZBKC		47
#define RISCV_ISA_EXT_ZBKX		48
#define RISCV_ISA_EXT_ZKND		49
#define RISCV_ISA_EXT_ZKNE		50
#define RISCV_ISA_EXT_ZKNH		51
#define RISCV_ISA_EXT_ZKR		52
#define RISCV_ISA_EXT_ZKSED		53
#define RISCV_ISA_EXT_ZKSH		54
#define RISCV_ISA_EXT_ZKT		55
#define RISCV_ISA_EXT_ZVBB		56
#define RISCV_ISA_EXT_ZVBC		57
#define RISCV_ISA_EXT_ZVKB		58
#define RISCV_ISA_EXT_ZVKG		59
#define RISCV_ISA_EXT_ZVKNED		60
#define RISCV_ISA_EXT_ZVKNHA		61
#define RISCV_ISA_EXT_ZVKNHB		62
#define RISCV_ISA_EXT_ZVKSED		63
#define RISCV_ISA_EXT_ZVKSH		64
#define RISCV_ISA_EXT_ZVKT		65
#define RISCV_ISA_EXT_ZFH		66
#define RISCV_ISA_EXT_ZFHMIN		67
#define RISCV_ISA_EXT_ZIHINTNTL		68
#define RISCV_ISA_EXT_ZVFH		69
#define RISCV_ISA_EXT_ZVFHMIN		70
#define RISCV_ISA_EXT_ZFA		71

#define RISCV_ISA_EXT_MAX		64
#define RISCV_ISA_EXT_MAX		128
#define RISCV_ISA_EXT_INVALID		U32_MAX

#ifdef CONFIG_RISCV_M_MODE
#define RISCV_ISA_EXT_SxAIA		RISCV_ISA_EXT_SMAIA
+26 −0
Original line number Diff line number Diff line
@@ -30,6 +30,32 @@ struct riscv_hwprobe {
#define		RISCV_HWPROBE_EXT_ZBB		(1 << 4)
#define		RISCV_HWPROBE_EXT_ZBS		(1 << 5)
#define		RISCV_HWPROBE_EXT_ZICBOZ	(1 << 6)
#define		RISCV_HWPROBE_EXT_ZBC		(1 << 7)
#define		RISCV_HWPROBE_EXT_ZBKB		(1 << 8)
#define		RISCV_HWPROBE_EXT_ZBKC		(1 << 9)
#define		RISCV_HWPROBE_EXT_ZBKX		(1 << 10)
#define		RISCV_HWPROBE_EXT_ZKND		(1 << 11)
#define		RISCV_HWPROBE_EXT_ZKNE		(1 << 12)
#define		RISCV_HWPROBE_EXT_ZKNH		(1 << 13)
#define		RISCV_HWPROBE_EXT_ZKSED		(1 << 14)
#define		RISCV_HWPROBE_EXT_ZKSH		(1 << 15)
#define		RISCV_HWPROBE_EXT_ZKT		(1 << 16)
#define		RISCV_HWPROBE_EXT_ZVBB		(1 << 17)
#define		RISCV_HWPROBE_EXT_ZVBC		(1 << 18)
#define		RISCV_HWPROBE_EXT_ZVKB		(1 << 19)
#define		RISCV_HWPROBE_EXT_ZVKG		(1 << 20)
#define		RISCV_HWPROBE_EXT_ZVKNED	(1 << 21)
#define		RISCV_HWPROBE_EXT_ZVKNHA	(1 << 22)
#define		RISCV_HWPROBE_EXT_ZVKNHB	(1 << 23)
#define		RISCV_HWPROBE_EXT_ZVKSED	(1 << 24)
#define		RISCV_HWPROBE_EXT_ZVKSH		(1 << 25)
#define		RISCV_HWPROBE_EXT_ZVKT		(1 << 26)
#define		RISCV_HWPROBE_EXT_ZFH		(1 << 27)
#define		RISCV_HWPROBE_EXT_ZFHMIN	(1 << 28)
#define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 << 29)
#define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)
#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1 << 31)
#define		RISCV_HWPROBE_EXT_ZFA		(1ULL << 32)
#define RISCV_HWPROBE_KEY_CPUPERF_0	5
#define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)
#define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)
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