Commit f385f024 authored by Tony Luck's avatar Tony Luck Committed by Borislav Petkov (AMD)
Browse files

x86/resctrl: Replace open coded cacheinfo searches



pseudo_lock_region_init() and rdtgroup_cbm_to_size() open code a search for
details of a particular cache level.

Replace with get_cpu_cacheinfo_level().

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: default avatarReinette Chatre <reinette.chatre@intel.com>
Link: https://lore.kernel.org/r/20240610003927.341707-5-tony.luck@intel.com
parent 685cb167
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+6 −11
Original line number Diff line number Diff line
@@ -292,9 +292,8 @@ static void pseudo_lock_region_clear(struct pseudo_lock_region *plr)
 */
static int pseudo_lock_region_init(struct pseudo_lock_region *plr)
{
	struct cpu_cacheinfo *ci;
	struct cacheinfo *ci;
	int ret;
	int i;

	/* Pick the first cpu we find that is associated with the cache. */
	plr->cpu = cpumask_first(&plr->d->cpu_mask);
@@ -306,16 +305,12 @@ static int pseudo_lock_region_init(struct pseudo_lock_region *plr)
		goto out_region;
	}

	ci = get_cpu_cacheinfo(plr->cpu);

	ci = get_cpu_cacheinfo_level(plr->cpu, plr->s->res->cache_level);
	if (ci) {
		plr->line_size = ci->coherency_line_size;
		plr->size = rdtgroup_cbm_to_size(plr->s->res, plr->d, plr->cbm);

	for (i = 0; i < ci->num_leaves; i++) {
		if (ci->info_list[i].level == plr->s->res->cache_level) {
			plr->line_size = ci->info_list[i].coherency_line_size;
		return 0;
	}
	}

	ret = -1;
	rdt_last_cmd_puts("Unable to determine cache line size\n");
+5 −9
Original line number Diff line number Diff line
@@ -1450,18 +1450,14 @@ static ssize_t rdtgroup_mode_write(struct kernfs_open_file *of,
unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r,
				  struct rdt_domain *d, unsigned long cbm)
{
	struct cpu_cacheinfo *ci;
	unsigned int size = 0;
	int num_b, i;
	struct cacheinfo *ci;
	int num_b;

	num_b = bitmap_weight(&cbm, r->cache.cbm_len);
	ci = get_cpu_cacheinfo(cpumask_any(&d->cpu_mask));
	for (i = 0; i < ci->num_leaves; i++) {
		if (ci->info_list[i].level == r->cache_level) {
			size = ci->info_list[i].size / r->cache.cbm_len * num_b;
			break;
		}
	}
	ci = get_cpu_cacheinfo_level(cpumask_any(&d->cpu_mask), r->cache_level);
	if (ci)
		size = ci->size / r->cache.cbm_len * num_b;

	return size;
}