Unverified Commit f40cab8e authored by Samuel Holland's avatar Samuel Holland Committed by Palmer Dabbelt
Browse files

riscv: Fix SMP when shadow call stacks are enabled 



This fixes two bugs in SCS initialization for secondary CPUs. First,
the SCS was not initialized at all in the spinwait boot path. Second,
the code for the SBI HSM path attempted to initialize the SCS before
enabling the MMU. However, that involves dereferencing the thread
pointer, which requires the MMU to be enabled.

Fix both issues by setting up the SCS in the common secondary entry
path, after enabling the MMU.

Fixes: d1584d79 ("riscv: Implement Shadow Call Stack")
Signed-off-by: default avatarSamuel Holland <samuel.holland@sifive.com>
Reviewed-by: default avatarSami Tolvanen <samitolvanen@google.com>
Link: https://lore.kernel.org/r/20231121211958.3158576-1-samuel.holland@sifive.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 96ba4a47

arch/riscv/kernel/head.S

+1 −1
Original line number Diff line number Diff line
@@ -154,7 +154,6 @@ secondary_start_sbi: 
	XIP_FIXUP_OFFSET a3

	add a3, a3, a1

	REG_L sp, (a3)

	scs_load_current



.Lsecondary_start_common:
@@ -165,6 +164,7 @@ secondary_start_sbi: 
	call relocate_enable_mmu

#endif

	call .Lsetup_trap_vector

	scs_load_current

	tail smp_callin

#endif /* CONFIG_SMP */