Commit f458cf79 authored by Mario Limonciello's avatar Mario Limonciello
Browse files

cpufreq/amd-pstate: Drop `cppc_cap1_cached`



The `cppc_cap1_cached` variable isn't used at all, there is no
need to read it at initialization for each CPU.

Reviewed-by: default avatarGautham R. Shenoy <gautham.shenoy@amd.com>
Reviewed-by: default avatarDhananjay Ugwekar <dhananjay.ugwekar@amd.com>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
parent 6f0b13f1
Loading
Loading
Loading
Loading
+0 −5
Original line number Diff line number Diff line
@@ -1508,11 +1508,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
		if (ret)
			return ret;
		WRITE_ONCE(cpudata->cppc_req_cached, value);

		ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, &value);
		if (ret)
			return ret;
		WRITE_ONCE(cpudata->cppc_cap1_cached, value);
	}
	ret = amd_pstate_set_epp(cpudata, cpudata->epp_default);
	if (ret)
+0 −2
Original line number Diff line number Diff line
@@ -76,7 +76,6 @@ struct amd_aperf_mperf {
 * 		  AMD P-State driver supports preferred core featue.
 * @epp_cached: Cached CPPC energy-performance preference value
 * @policy: Cpufreq policy value
 * @cppc_cap1_cached Cached MSR_AMD_CPPC_CAP1 register value
 *
 * The amd_cpudata is key private data for each CPU thread in AMD P-State, and
 * represents all the attributes and goals that AMD P-State requests at runtime.
@@ -105,7 +104,6 @@ struct amd_cpudata {
	/* EPP feature related attributes*/
	u8	epp_cached;
	u32	policy;
	u64	cppc_cap1_cached;
	bool	suspended;
	u8	epp_default;
};