Commit f4a8e3a3 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: drop intr_start from DPU 3.x catalog files 

DPU 3.x don't have separate intr_start interrupt, drop it from catalog
files.

Fixes: 94391a14 ("drm/msm/dpu1: Add MSM8998 to hw catalog")
Fixes: 7204df5e ("drm/msm/dpu: add support for SDM660 and SDM630 platforms")
Patchwork: https://patchwork.freedesktop.org/patch/696488/
Link: https://lore.kernel.org/r/20251228-mdp5-drop-dpu3-v4-1-7497c3d39179@oss.qualcomm.com


Tested-by: default avatarAlexey Minnekhanov <alexeymin@minlexx.ru>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
parent 2f3ff6ab

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

+0 −5
Original line number Diff line number Diff line
@@ -42,24 +42,19 @@ static const struct dpu_ctl_cfg msm8998_ctl[] = { 
		.name = "ctl_0", .id = CTL_0,

		.base = 0x1000, .len = 0x94,

		.features = BIT(DPU_CTL_SPLIT_DISPLAY),

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),

	}, {

		.name = "ctl_1", .id = CTL_1,

		.base = 0x1200, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),

	}, {

		.name = "ctl_2", .id = CTL_2,

		.base = 0x1400, .len = 0x94,

		.features = BIT(DPU_CTL_SPLIT_DISPLAY),

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11),

	}, {

		.name = "ctl_3", .id = CTL_3,

		.base = 0x1600, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12),

	}, {

		.name = "ctl_4", .id = CTL_4,

		.base = 0x1800, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13),

	},

};

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h

+0 −5
Original line number Diff line number Diff line
@@ -37,24 +37,19 @@ static const struct dpu_ctl_cfg sdm660_ctl[] = { 
		.name = "ctl_0", .id = CTL_0,

		.base = 0x1000, .len = 0x94,

		.features = BIT(DPU_CTL_SPLIT_DISPLAY),

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),

	}, {

		.name = "ctl_1", .id = CTL_1,

		.base = 0x1200, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),

	}, {

		.name = "ctl_2", .id = CTL_2,

		.base = 0x1400, .len = 0x94,

		.features = BIT(DPU_CTL_SPLIT_DISPLAY),

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11),

	}, {

		.name = "ctl_3", .id = CTL_3,

		.base = 0x1600, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12),

	}, {

		.name = "ctl_4", .id = CTL_4,

		.base = 0x1800, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13),

	},

};

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h

+0 −5
Original line number Diff line number Diff line
@@ -36,24 +36,19 @@ static const struct dpu_ctl_cfg sdm630_ctl[] = { 
		.name = "ctl_0", .id = CTL_0,

		.base = 0x1000, .len = 0x94,

		.features = BIT(DPU_CTL_SPLIT_DISPLAY),

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),

	}, {

		.name = "ctl_1", .id = CTL_1,

		.base = 0x1200, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),

	}, {

		.name = "ctl_2", .id = CTL_2,

		.base = 0x1400, .len = 0x94,

		.features = BIT(DPU_CTL_SPLIT_DISPLAY),

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11),

	}, {

		.name = "ctl_3", .id = CTL_3,

		.base = 0x1600, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12),

	}, {

		.name = "ctl_4", .id = CTL_4,

		.base = 0x1800, .len = 0x94,

		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13),

	},

};