Commit f4ea67a7 authored by Radim Krčmář's avatar Radim Krčmář Committed by Paul Walmsley
Browse files

riscv: use lw when reading int cpu in asm_per_cpu 



REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: be97d0db ("riscv: VMAP_STACK overflow detection thread-safe")
Cc: stable@vger.kernel.org
Reviewed-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: default avatarRadim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250725165410.2896641-5-rkrcmar@ventanamicro.com


Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent 8a16586f

arch/riscv/include/asm/asm.h

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ 
#endif



.macro asm_per_cpu dst sym tmp

	REG_L \tmp, TASK_TI_CPU_NUM(tp)

	lw    \tmp, TASK_TI_CPU_NUM(tp)

	slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT

	la    \dst, __per_cpu_offset

	add   \dst, \dst, \tmp