Unverified Commit f51d3406 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'socfpga_dts_updates_for_v6.20_v3' of... 

Merge tag 'socfpga_dts_updates_for_v6.20_v3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.20, version 3
- dt-bindings updates:
	- Add intel,socfpga-agilex5-socdk-modular for the Agilex5 mod board
	- Add intel,socfpga-agilex-emmc for the Agilex eMMC daughter board
	- Move entries in intel,socfpga.yaml into altera.yaml
	- Add syscon as a fallback for sys-mgr

- Add dma-cohrerent property for Agilex5 NAND and DMA
- Add support for the Agilex5 modular board
- Add IOMMUS property for ethernet nodes for Agilex5
- Use lowercase hex for dts files
- Add #address-cells and #size-cells for sram
- Fix dtbs_check warning for fpga-region
- Move dma controller node for Agilex5 under simple-bus
- Add support for the Agilex eMMC daughter board

* tag 'socfpga_dts_updates_for_v6.20_v3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux

:
  dt-bindings: intel: Add Agilex eMMC support
  arm64: dts: socfpga: agilex: add emmc support
  arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node
  ARM: dts: socfpga: fix dtbs_check warning for fpga-region
  ARM: dts: socfpga: add #address-cells and #size-cells for sram node
  dt-bindings: altera: document syscon as fallback for sys-mgr
  arm64: dts: altera: Use lowercase hex
  dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml
  arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes
  arm64: dts: socfpga: agilex5: add support for modular board
  dt-bindings: intel: Add Agilex5 SoCFPGA modular board
  arm64: dts: socfpga: agilex5: Add dma-coherent property

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 0a82d3d4 4d904af4

Documentation/devicetree/bindings/arm/altera.yaml

+27 −0
Original line number Diff line number Diff line
@@ -9,6 +9,9 @@ title: Altera's SoCFPGA platform 
maintainers:

  - Dinh Nguyen <dinguyen@kernel.org>



description:

  Altera/Intel boards with ARM 32/64 bits cores



properties:

  $nodename:

    const: "/"
@@ -81,6 +84,30 @@ properties: 
              - altr,socfpga-stratix10-swvp

          - const: altr,socfpga-stratix10



      - description: AgileX boards

        items:

          - enum:

              - intel,n5x-socdk

              - intel,socfpga-agilex-n6000

              - intel,socfpga-agilex-socdk

              - intel,socfpga-agilex-socdk-emmc

          - const: intel,socfpga-agilex



      - description: Agilex3 boards

        items:

          - enum:

              - intel,socfpga-agilex3-socdk

          - const: intel,socfpga-agilex3

          - const: intel,socfpga-agilex5



      - description: Agilex5 boards

        items:

          - enum:

              - intel,socfpga-agilex5-socdk

              - intel,socfpga-agilex5-socdk-013b

              - intel,socfpga-agilex5-socdk-nand

          - const: intel,socfpga-agilex5



      - description: SoCFPGA VT

        items:

          - const: altr,socfpga-vt

Documentation/devicetree/bindings/arm/intel,socfpga.yaml

deleted100644 → 0
+0 −40
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/arm/intel,socfpga.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel SoCFPGA platform



maintainers:

  - Dinh Nguyen <dinguyen@kernel.org>



properties:

  $nodename:

    const: "/"

  compatible:

    oneOf:

      - description: AgileX boards

        items:

          - enum:

              - intel,n5x-socdk

              - intel,socfpga-agilex-n6000

              - intel,socfpga-agilex-socdk

          - const: intel,socfpga-agilex

      - description: Agilex3 boards

        items:

          - enum:

              - intel,socfpga-agilex3-socdk

          - const: intel,socfpga-agilex3

          - const: intel,socfpga-agilex5

      - description: Agilex5 boards

        items:

          - enum:

              - intel,socfpga-agilex5-socdk

              - intel,socfpga-agilex5-socdk-013b

              - intel,socfpga-agilex5-socdk-nand

          - const: intel,socfpga-agilex5



additionalProperties: true



...

Documentation/devicetree/bindings/soc/altera/altr,sys-mgr.yaml

+4 −2
Original line number Diff line number Diff line
@@ -13,7 +13,9 @@ properties: 
  compatible:

    oneOf:

      - description: Cyclone5/Arria5/Arria10

        const: altr,sys-mgr

        items:

          - const: altr,sys-mgr

          - const: syscon

      - description: Stratix10 SoC

        items:

          - const: altr,sys-mgr-s10
@@ -45,7 +47,7 @@ additionalProperties: false 
examples:

  - |

    sysmgr@ffd08000 {

      compatible = "altr,sys-mgr";

      compatible = "altr,sys-mgr", "syscon";

      reg = <0xffd08000 0x1000>;

      cpu1-start-addr = <0xffd080c4>;

    };

arch/arm/boot/dts/intel/socfpga/socfpga.dtsi

+5 −1
Original line number Diff line number Diff line
@@ -87,12 +87,13 @@ pdma: pdma@ffe01000 { 
			};

		};



		base_fpga_region {

		base_fpga_region: fpga-region {

			compatible = "fpga-region";

			fpga-mgr = <&fpgamgr0>;



			#address-cells = <0x1>;

			#size-cells = <0x1>;

			ranges;

		};



		can0: can@ffc00000 {
@@ -785,6 +786,9 @@ nand0: nand-controller@ff900000 { 
		ocram: sram@ffff0000 {

			compatible = "mmio-sram";

			reg = <0xffff0000 0x10000>;

			#address-cells = <0x1>;

			#size-cells = <0x1>;

			ranges;

		};



		qspi: spi@ff705000 {

arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi

+5 −1
Original line number Diff line number Diff line
@@ -80,12 +80,13 @@ pdma: pdma@ffda1000 { 
			};

		};



		base_fpga_region {

		base_fpga_region: fpga-region {

			#address-cells = <0x1>;

			#size-cells = <0x1>;



			compatible = "fpga-region";

			fpga-mgr = <&fpga_mgr>;

			ranges;

		};



		clkmgr@ffd04000 {
@@ -686,6 +687,9 @@ nand: nand-controller@ffb90000 { 
		ocram: sram@ffe00000 {

			compatible = "mmio-sram";

			reg = <0xffe00000 0x40000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;

		};



		eccmgr: eccmgr {