Commit f55fcf15 authored May 14, 2025 by Mangesh Gadre Committed by Alex Deucher May 22, 2025

drm/amdgpu: Add vcn poison status reg



added register to enable vcn ras

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 74956242

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -1067,6 +1067,8 @@
		#define regVCN_FEATURES_BASE_IDX 1
		#define regUVD_GPUIOV_STATUS 0x0055
		#define regUVD_GPUIOV_STATUS_BASE_IDX 1
		#define regUVD_RAS_VCPU_VCODEC_STATUS 0x0057
		#define regUVD_RAS_VCPU_VCODEC_STATUS_BASE_IDX 1
		#define regUVD_SCRATCH15 0x005c
		#define regUVD_SCRATCH15_BASE_IDX 1
		#define regUVD_VERSION 0x005d

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

+6 −0

Original line number	Diff line number	Diff line
		@@ -5714,6 +5714,12 @@
		//UVD_GPUIOV_STATUS
		#define UVD_GPUIOV_STATUS__UVD_GPUIOV_STATUS_VF_ENABLE__SHIFT 0x0
		#define UVD_GPUIOV_STATUS__UVD_GPUIOV_STATUS_VF_ENABLE_MASK 0x00000001L
		//UVD_RAS_VCPU_VCODEC_STATUS
		#define UVD_RAS_VCPU_VCODEC_STATUS__POISONED_VF__SHIFT 0x0
		#define UVD_RAS_VCPU_VCODEC_STATUS__POISONED_PF__SHIFT 0x1f
		#define UVD_RAS_VCPU_VCODEC_STATUS__POISONED_VF_MASK 0x7FFFFFFFL
		#define UVD_RAS_VCPU_VCODEC_STATUS__POISONED_PF_MASK 0x80000000L

		//UVD_SCRATCH15
		#define UVD_SCRATCH15__SCRATCH15_DATA__SHIFT 0x0
		#define UVD_SCRATCH15__SCRATCH15_DATA_MASK 0xFFFFFFFFL