Commit f5b463fd authored by Gustavo Sousa's avatar Gustavo Sousa Committed by Matt Roper
Browse files

drm/xe/xe2: Assume tuning settings also apply for future media GT 



We already make the assumption that recommended tuning settings for
primary GT on Xe2 will also apply for future releases. Let's make the
same assumption for the media GT. We can come back and define closed
ranges when that becomes necessary.

Bspec: 72161
Reviewed-by: default avatarTejas Upadhyay <tejas.upadhyay@intel.com>
Signed-off-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240920211459.255181-4-gustavo.sousa@intel.com
parent e1f81394

drivers/gpu/drm/xe/xe_tuning.c

+5 −5
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ static const struct xe_rtp_entry_sr gt_tunings[] = { 
				   REG_FIELD_PREP(L3_PWM_TIMER_INIT_VAL_MASK, 0x7f)))

	},

	{ XE_RTP_NAME("Tuning: L3 cache - media"),

	  XE_RTP_RULES(MEDIA_VERSION(2000)),

	  XE_RTP_RULES(MEDIA_VERSION_RANGE(2000, XE_RTP_END_VERSION_UNDEFINED)),

	  XE_RTP_ACTIONS(FIELD_SET(XE2LPM_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK,

				   REG_FIELD_PREP(L3_PWM_TIMER_INIT_VAL_MASK, 0x7f)))

	},
@@ -43,7 +43,7 @@ static const struct xe_rtp_entry_sr gt_tunings[] = { 
			 SET(CCCHKNREG1, L3CMPCTRL))

	},

	{ XE_RTP_NAME("Tuning: Compression Overfetch - media"),

	  XE_RTP_RULES(MEDIA_VERSION(2000)),

	  XE_RTP_RULES(MEDIA_VERSION_RANGE(2000, XE_RTP_END_VERSION_UNDEFINED)),

	  XE_RTP_ACTIONS(CLR(XE2LPM_CCCHKNREG1, ENCOMPPERFFIX),

			 SET(XE2LPM_CCCHKNREG1, L3CMPCTRL))

	},
@@ -52,7 +52,7 @@ static const struct xe_rtp_entry_sr gt_tunings[] = { 
	  XE_RTP_ACTIONS(SET(L3SQCREG3, COMPPWOVERFETCHEN))

	},

	{ XE_RTP_NAME("Tuning: Enable compressible partial write overfetch in L3 - media"),

	  XE_RTP_RULES(MEDIA_VERSION(2000)),

	  XE_RTP_RULES(MEDIA_VERSION_RANGE(2000, XE_RTP_END_VERSION_UNDEFINED)),

	  XE_RTP_ACTIONS(SET(XE2LPM_L3SQCREG3, COMPPWOVERFETCHEN))

	},

	{ XE_RTP_NAME("Tuning: L2 Overfetch Compressible Only"),
@@ -61,7 +61,7 @@ static const struct xe_rtp_entry_sr gt_tunings[] = { 
			     COMPMEMRD256BOVRFETCHEN))

	},

	{ XE_RTP_NAME("Tuning: L2 Overfetch Compressible Only - media"),

	  XE_RTP_RULES(MEDIA_VERSION(2000)),

	  XE_RTP_RULES(MEDIA_VERSION_RANGE(2000, XE_RTP_END_VERSION_UNDEFINED)),

	  XE_RTP_ACTIONS(SET(XE2LPM_L3SQCREG2,

			     COMPMEMRD256BOVRFETCHEN))

	},
@@ -71,7 +71,7 @@ static const struct xe_rtp_entry_sr gt_tunings[] = { 
				   REG_FIELD_PREP(UNIFIED_COMPRESSION_FORMAT, 0)))

	},

	{ XE_RTP_NAME("Tuning: Stateless compression control - media"),

	  XE_RTP_RULES(MEDIA_VERSION_RANGE(1301, 2000)),

	  XE_RTP_RULES(MEDIA_VERSION_RANGE(1301, XE_RTP_END_VERSION_UNDEFINED)),

	  XE_RTP_ACTIONS(FIELD_SET(STATELESS_COMPRESSION_CTRL, UNIFIED_COMPRESSION_FORMAT,

				   REG_FIELD_PREP(UNIFIED_COMPRESSION_FORMAT, 0)))

	},