Commit f5d6c413 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.11-2024-09-11' of... 

Merge tag 'amd-drm-fixes-6.11-2024-09-11' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.11-2024-09-11:

amdgpu:
- Avoid races between set_drr() functions and dc_state_destruct()
- Fix regerssion related to zpos
- Fix regression related to overlay cursor
- SMU 14.x updates
- JPEG fixes
- Silence an UBSAN warning

amdkfd:
- Fetch cacheline size from IP discovery

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240911170528.838655-1-alexander.deucher@amd.com
parents da3ea350 2a2a865a

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

+75 −1
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 


#include "amdgpu.h"

#include "amdgpu_jpeg.h"

#include "amdgpu_cs.h"

#include "soc15.h"

#include "soc15d.h"

#include "vcn_v1_0.h"
@@ -34,6 +35,9 @@ 
static void jpeg_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev);

static void jpeg_v1_0_set_irq_funcs(struct amdgpu_device *adev);

static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring);

static int jpeg_v1_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,

				     struct amdgpu_job *job,

				     struct amdgpu_ib *ib);



static void jpeg_v1_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t val)

{
@@ -300,6 +304,9 @@ static void jpeg_v1_0_decode_ring_emit_ib(struct amdgpu_ring *ring, 


	amdgpu_ring_write(ring,

		PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_IB_VMID), 0, 0, PACKETJ_TYPE0));

	if (ring->funcs->parse_cs)

		amdgpu_ring_write(ring, 0);

	else

		amdgpu_ring_write(ring, (vmid | (vmid << 4)));



	amdgpu_ring_write(ring,
@@ -554,6 +561,7 @@ static const struct amdgpu_ring_funcs jpeg_v1_0_decode_ring_vm_funcs = { 
	.get_rptr = jpeg_v1_0_decode_ring_get_rptr,

	.get_wptr = jpeg_v1_0_decode_ring_get_wptr,

	.set_wptr = jpeg_v1_0_decode_ring_set_wptr,

	.parse_cs = jpeg_v1_dec_ring_parse_cs,

	.emit_frame_size =

		6 + 6 + /* hdp invalidate / flush */

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
@@ -611,3 +619,69 @@ static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring) 


	vcn_v1_0_set_pg_for_begin_use(ring, set_clocks);

}



/**

 * jpeg_v1_dec_ring_parse_cs - command submission parser

 *

 * @parser: Command submission parser context

 * @job: the job to parse

 * @ib: the IB to parse

 *

 * Parse the command stream, return -EINVAL for invalid packet,

 * 0 otherwise

 */

static int jpeg_v1_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,

				     struct amdgpu_job *job,

				     struct amdgpu_ib *ib)

{

	u32 i, reg, res, cond, type;

	int ret = 0;

	struct amdgpu_device *adev = parser->adev;



	for (i = 0; i < ib->length_dw ; i += 2) {

		reg  = CP_PACKETJ_GET_REG(ib->ptr[i]);

		res  = CP_PACKETJ_GET_RES(ib->ptr[i]);

		cond = CP_PACKETJ_GET_COND(ib->ptr[i]);

		type = CP_PACKETJ_GET_TYPE(ib->ptr[i]);



		if (res || cond != PACKETJ_CONDITION_CHECK0) /* only allow 0 for now */

			return -EINVAL;



		if (reg >= JPEG_V1_REG_RANGE_START && reg <= JPEG_V1_REG_RANGE_END)

			continue;



		switch (type) {

		case PACKETJ_TYPE0:

			if (reg != JPEG_V1_LMI_JPEG_WRITE_64BIT_BAR_HIGH &&

			    reg != JPEG_V1_LMI_JPEG_WRITE_64BIT_BAR_LOW &&

			    reg != JPEG_V1_LMI_JPEG_READ_64BIT_BAR_HIGH &&

			    reg != JPEG_V1_LMI_JPEG_READ_64BIT_BAR_LOW &&

			    reg != JPEG_V1_REG_CTX_INDEX &&

			    reg != JPEG_V1_REG_CTX_DATA) {

				ret = -EINVAL;

			}

			break;

		case PACKETJ_TYPE1:

			if (reg != JPEG_V1_REG_CTX_DATA)

				ret = -EINVAL;

			break;

		case PACKETJ_TYPE3:

			if (reg != JPEG_V1_REG_SOFT_RESET)

				ret = -EINVAL;

			break;

		case PACKETJ_TYPE6:

			if (ib->ptr[i] != CP_PACKETJ_NOP)

				ret = -EINVAL;

			break;

		default:

			ret = -EINVAL;

		}



		if (ret) {

			dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);

			break;

		}

	}



	return ret;

}

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h

+11 −0
Original line number Diff line number Diff line
@@ -29,4 +29,15 @@ int jpeg_v1_0_sw_init(void *handle); 
void jpeg_v1_0_sw_fini(void *handle);

void jpeg_v1_0_start(struct amdgpu_device *adev, int mode);



#define JPEG_V1_REG_RANGE_START	0x8000

#define JPEG_V1_REG_RANGE_END	0x803f



#define JPEG_V1_LMI_JPEG_WRITE_64BIT_BAR_HIGH	0x8238

#define JPEG_V1_LMI_JPEG_WRITE_64BIT_BAR_LOW	0x8239

#define JPEG_V1_LMI_JPEG_READ_64BIT_BAR_HIGH	0x825a

#define JPEG_V1_LMI_JPEG_READ_64BIT_BAR_LOW	0x825b

#define JPEG_V1_REG_CTX_INDEX			0x8328

#define JPEG_V1_REG_CTX_DATA			0x8329

#define JPEG_V1_REG_SOFT_RESET			0x83a0



#endif /*__JPEG_V1_0_H__*/

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

+62 −1
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 


#include "amdgpu.h"

#include "amdgpu_jpeg.h"

#include "amdgpu_cs.h"

#include "amdgpu_pm.h"

#include "soc15.h"

#include "soc15d.h"
@@ -538,6 +539,10 @@ void jpeg_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring, 


	amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,

		0, 0, PACKETJ_TYPE0));



	if (ring->funcs->parse_cs)

		amdgpu_ring_write(ring, 0);

	else

		amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));



	amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,
@@ -764,6 +769,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = { 
	.get_rptr = jpeg_v2_0_dec_ring_get_rptr,

	.get_wptr = jpeg_v2_0_dec_ring_get_wptr,

	.set_wptr = jpeg_v2_0_dec_ring_set_wptr,

	.parse_cs = jpeg_v2_dec_ring_parse_cs,

	.emit_frame_size =

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +

		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
@@ -810,3 +816,58 @@ const struct amdgpu_ip_block_version jpeg_v2_0_ip_block = { 
		.rev = 0,

		.funcs = &jpeg_v2_0_ip_funcs,

};



/**

 * jpeg_v2_dec_ring_parse_cs - command submission parser

 *

 * @parser: Command submission parser context

 * @job: the job to parse

 * @ib: the IB to parse

 *

 * Parse the command stream, return -EINVAL for invalid packet,

 * 0 otherwise

 */

int jpeg_v2_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,

			      struct amdgpu_job *job,

			      struct amdgpu_ib *ib)

{

	u32 i, reg, res, cond, type;

	struct amdgpu_device *adev = parser->adev;



	for (i = 0; i < ib->length_dw ; i += 2) {

		reg  = CP_PACKETJ_GET_REG(ib->ptr[i]);

		res  = CP_PACKETJ_GET_RES(ib->ptr[i]);

		cond = CP_PACKETJ_GET_COND(ib->ptr[i]);

		type = CP_PACKETJ_GET_TYPE(ib->ptr[i]);



		if (res) /* only support 0 at the moment */

			return -EINVAL;



		switch (type) {

		case PACKETJ_TYPE0:

			if (cond != PACKETJ_CONDITION_CHECK0 || reg < JPEG_REG_RANGE_START ||

			    reg > JPEG_REG_RANGE_END) {

				dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);

				return -EINVAL;

			}

			break;

		case PACKETJ_TYPE3:

			if (cond != PACKETJ_CONDITION_CHECK3 || reg < JPEG_REG_RANGE_START ||

			    reg > JPEG_REG_RANGE_END) {

				dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);

				return -EINVAL;

			}

			break;

		case PACKETJ_TYPE6:

			if (ib->ptr[i] == CP_PACKETJ_NOP)

				continue;

			dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);

			return -EINVAL;

		default:

			dev_err(adev->dev, "Unknown packet type %d !\n", type);

			return -EINVAL;

		}

	}



	return 0;

}

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h

+6 −0
Original line number Diff line number Diff line
@@ -45,6 +45,9 @@ 


#define JRBC_DEC_EXTERNAL_REG_WRITE_ADDR				0x18000



#define JPEG_REG_RANGE_START						0x4000

#define JPEG_REG_RANGE_END						0x41c2



void jpeg_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring);

void jpeg_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring);

void jpeg_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
@@ -57,6 +60,9 @@ void jpeg_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring, 
				unsigned vmid, uint64_t pd_addr);

void jpeg_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);

void jpeg_v2_0_dec_ring_nop(struct amdgpu_ring *ring, uint32_t count);

int jpeg_v2_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,

			      struct amdgpu_job *job,

			      struct amdgpu_ib *ib);



extern const struct amdgpu_ip_block_version jpeg_v2_0_ip_block;

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

+2 −0
Original line number Diff line number Diff line
@@ -662,6 +662,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_5_dec_ring_vm_funcs = { 
	.get_rptr = jpeg_v2_5_dec_ring_get_rptr,

	.get_wptr = jpeg_v2_5_dec_ring_get_wptr,

	.set_wptr = jpeg_v2_5_dec_ring_set_wptr,

	.parse_cs = jpeg_v2_dec_ring_parse_cs,

	.emit_frame_size =

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +

		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
@@ -691,6 +692,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_6_dec_ring_vm_funcs = { 
	.get_rptr = jpeg_v2_5_dec_ring_get_rptr,

	.get_wptr = jpeg_v2_5_dec_ring_get_wptr,

	.set_wptr = jpeg_v2_5_dec_ring_set_wptr,

	.parse_cs = jpeg_v2_dec_ring_parse_cs,

	.emit_frame_size =

		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +

		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +