sh: Split out irqflags.h in to _32 and _64 variants. (f64ee876) · Commits · git / linux-net

include/asm-sh64/registers.h→include/asm-sh/cpu-sh5/registers.h

+0 −0

File moved.

include/asm-sh/irqflags.h

+4 −93

Original line number	Diff line number	Diff line
		#ifndef __ASM_SH_IRQFLAGS_H
		#define __ASM_SH_IRQFLAGS_H

		static inline void raw_local_irq_enable(void)
		{
		unsigned long __dummy0, __dummy1;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"and %1, %0\n\t"
		#ifdef CONFIG_CPU_HAS_SR_RB
		"stc r6_bank, %1\n\t"
		"or %1, %0\n\t"
		#ifdef CONFIG_SUPERH32
		#include "irqflags_32.h"
		#else
		#include "irqflags_64.h"
		#endif
		"ldc %0, sr\n\t"
		: "=&r" (__dummy0), "=r" (__dummy1)
		: "1" (~0x000000f0)
		: "memory"
		);
		}

		static inline void raw_local_irq_disable(void)
		{
		unsigned long flags;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"or #0xf0, %0\n\t"
		"ldc %0, sr\n\t"
		: "=&z" (flags)
		: /* no inputs */
		: "memory"
		);
		}

		static inline void set_bl_bit(void)
		{
		unsigned long __dummy0, __dummy1;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"or %2, %0\n\t"
		"and %3, %0\n\t"
		"ldc %0, sr\n\t"
		: "=&r" (__dummy0), "=r" (__dummy1)
		: "r" (0x10000000), "r" (0xffffff0f)
		: "memory"
		);
		}

		static inline void clear_bl_bit(void)
		{
		unsigned long __dummy0, __dummy1;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"and %2, %0\n\t"
		"ldc %0, sr\n\t"
		: "=&r" (__dummy0), "=r" (__dummy1)
		: "1" (~0x10000000)
		: "memory"
		);
		}

		static inline unsigned long __raw_local_save_flags(void)
		{
		unsigned long flags;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"and #0xf0, %0\n\t"
		: "=&z" (flags)
		: /* no inputs */
		: "memory"
		);

		return flags;
		}

		#define raw_local_save_flags(flags) \
		do { (flags) = __raw_local_save_flags(); } while (0)
		@@ -92,25 +22,6 @@ static inline int raw_irqs_disabled(void)
		return raw_irqs_disabled_flags(flags);
		}

		static inline unsigned long __raw_local_irq_save(void)
		{
		unsigned long flags, __dummy;

		__asm__ __volatile__ (
		"stc sr, %1\n\t"
		"mov %1, %0\n\t"
		"or #0xf0, %0\n\t"
		"ldc %0, sr\n\t"
		"mov %1, %0\n\t"
		"and #0xf0, %0\n\t"
		: "=&z" (flags), "=&r" (__dummy)
		: /* no inputs */
		: "memory"
		);

		return flags;
		}

		#define raw_local_irq_save(flags) \
		do { (flags) = __raw_local_irq_save(); } while (0)

include/asm-sh/irqflags_32.h

0 → 100644

+99 −0

Original line number	Diff line number	Diff line
		#ifndef __ASM_SH_IRQFLAGS_32_H
		#define __ASM_SH_IRQFLAGS_32_H

		static inline void raw_local_irq_enable(void)
		{
		unsigned long __dummy0, __dummy1;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"and %1, %0\n\t"
		#ifdef CONFIG_CPU_HAS_SR_RB
		"stc r6_bank, %1\n\t"
		"or %1, %0\n\t"
		#endif
		"ldc %0, sr\n\t"
		: "=&r" (__dummy0), "=r" (__dummy1)
		: "1" (~0x000000f0)
		: "memory"
		);
		}

		static inline void raw_local_irq_disable(void)
		{
		unsigned long flags;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"or #0xf0, %0\n\t"
		"ldc %0, sr\n\t"
		: "=&z" (flags)
		: /* no inputs */
		: "memory"
		);
		}

		static inline void set_bl_bit(void)
		{
		unsigned long __dummy0, __dummy1;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"or %2, %0\n\t"
		"and %3, %0\n\t"
		"ldc %0, sr\n\t"
		: "=&r" (__dummy0), "=r" (__dummy1)
		: "r" (0x10000000), "r" (0xffffff0f)
		: "memory"
		);
		}

		static inline void clear_bl_bit(void)
		{
		unsigned long __dummy0, __dummy1;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"and %2, %0\n\t"
		"ldc %0, sr\n\t"
		: "=&r" (__dummy0), "=r" (__dummy1)
		: "1" (~0x10000000)
		: "memory"
		);
		}

		static inline unsigned long __raw_local_save_flags(void)
		{
		unsigned long flags;

		__asm__ __volatile__ (
		"stc sr, %0\n\t"
		"and #0xf0, %0\n\t"
		: "=&z" (flags)
		: /* no inputs */
		: "memory"
		);

		return flags;
		}

		static inline unsigned long __raw_local_irq_save(void)
		{
		unsigned long flags, __dummy;

		__asm__ __volatile__ (
		"stc sr, %1\n\t"
		"mov %1, %0\n\t"
		"or #0xf0, %0\n\t"
		"ldc %0, sr\n\t"
		"mov %1, %0\n\t"
		"and #0xf0, %0\n\t"
		: "=&z" (flags), "=&r" (__dummy)
		: /* no inputs */
		: "memory"
		);

		return flags;
		}

		#endif /* __ASM_SH_IRQFLAGS_32_H */

include/asm-sh/irqflags_64.h

0 → 100644

+85 −0

Original line number	Diff line number	Diff line
		#ifndef __ASM_SH_IRQFLAGS_64_H
		#define __ASM_SH_IRQFLAGS_64_H

		#include <asm/cpu/registers.h>

		#define SR_MASK_LL 0x00000000000000f0LL
		#define SR_BL_LL 0x0000000010000000LL

		static inline void raw_local_irq_enable(void)
		{
		unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL;

		__asm__ __volatile__("getcon " __SR ", %0\n\t"
		"and %0, %1, %0\n\t"
		"putcon %0, " __SR "\n\t"
		: "=&r" (__dummy0)
		: "r" (__dummy1));
		}

		static inline void raw_local_irq_disable(void)
		{
		unsigned long long __dummy0, __dummy1 = SR_MASK_LL;

		__asm__ __volatile__("getcon " __SR ", %0\n\t"
		"or %0, %1, %0\n\t"
		"putcon %0, " __SR "\n\t"
		: "=&r" (__dummy0)
		: "r" (__dummy1));
		}

		static inline void set_bl_bit(void)
		{
		unsigned long long __dummy0, __dummy1 = SR_BL_LL;

		__asm__ __volatile__("getcon " __SR ", %0\n\t"
		"or %0, %1, %0\n\t"
		"putcon %0, " __SR "\n\t"
		: "=&r" (__dummy0)
		: "r" (__dummy1));

		}

		static inline void clear_bl_bit(void)
		{
		unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;

		__asm__ __volatile__("getcon " __SR ", %0\n\t"
		"and %0, %1, %0\n\t"
		"putcon %0, " __SR "\n\t"
		: "=&r" (__dummy0)
		: "r" (__dummy1));
		}

		static inline unsigned long __raw_local_save_flags(void)
		{
		unsigned long long __dummy = SR_MASK_LL;
		unsigned long flags;

		__asm__ __volatile__ (
		"getcon " __SR ", %0\n\t"
		"and %0, %1, %0"
		: "=&r" (flags)
		: "r" (__dummy));

		return flags;
		}

		static inline unsigned long __raw_local_irq_save(void)
		{
		unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
		unsigned long flags;

		__asm__ __volatile__ (
		"getcon " __SR ", %1\n\t"
		"or %1, r63, %0\n\t"
		"or %1, %2, %1\n\t"
		"putcon %1, " __SR "\n\t"
		"and %0, %2, %0"
		: "=&r" (flags), "=&r" (__dummy0)
		: "r" (__dummy1));

		return flags;
		}

		#endif /* __ASM_SH_IRQFLAGS_64_H */