Commit f6f425f3 authored by Chiara Meiohas's avatar Chiara Meiohas Committed by Leon Romanovsky
Browse files

net/mlx5: Add RDMA_CTRL HW capabilities 



Add RDMA_CTRL UCTX capabilities and add the RDMA_CTRL general object
type in hca_cap_2.

Reviewed-by: default avatarMoshe Shemesh <moshe@nvidia.com>
Signed-off-by: default avatarChiara Meiohas <cmeiohas@nvidia.com>
Link: https://patch.msgid.link/ef7eb24be9a6f247ab52e8b4480350072e5182f5.1740574103.git.leon@kernel.org


Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent 80df31f3

include/linux/mlx5/mlx5_ifc.h

+9 −1
Original line number Diff line number Diff line
@@ -1570,6 +1570,8 @@ enum { 
enum {

	MLX5_UCTX_CAP_RAW_TX = 1UL << 0,

	MLX5_UCTX_CAP_INTERNAL_DEV_RES = 1UL << 1,

	MLX5_UCTX_CAP_RDMA_CTRL = 1UL << 3,

	MLX5_UCTX_CAP_RDMA_CTRL_OTHER_VHCA = 1UL << 4,

};



#define MLX5_FC_BULK_SIZE_FACTOR 128
@@ -2140,7 +2142,8 @@ struct mlx5_ifc_cmd_hca_cap_2_bits { 
	u8	   log_min_mkey_entity_size[0x5];

	u8	   reserved_at_1b0[0x10];



	u8	   reserved_at_1c0[0x60];

	u8	   general_obj_types_127_64[0x40];

	u8	   reserved_at_200[0x20];



	u8	   reserved_at_220[0x1];

	u8	   sw_vhca_id_valid[0x1];
@@ -12494,6 +12497,10 @@ enum { 
	MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_FLOW_METER_ASO = BIT_ULL(0x24),

};



enum {

	MLX5_HCA_CAP_2_GENERAL_OBJECT_TYPES_RDMA_CTRL = BIT_ULL(0x13),

};



enum {

	MLX5_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = 0xc,

	MLX5_GENERAL_OBJECT_TYPES_IPSEC = 0x13,
@@ -12501,6 +12508,7 @@ enum { 
	MLX5_GENERAL_OBJECT_TYPES_FLOW_METER_ASO = 0x24,

	MLX5_GENERAL_OBJECT_TYPES_MACSEC = 0x27,

	MLX5_GENERAL_OBJECT_TYPES_INT_KEK = 0x47,

	MLX5_GENERAL_OBJECT_TYPES_RDMA_CTRL = 0x53,

	MLX5_GENERAL_OBJECT_TYPES_FLOW_TABLE_ALIAS = 0xff15,

};