Commit f703b602 authored by Martyn Welch's avatar Martyn Welch Committed by Shawn Guo
Browse files

arm64: dts: imx8mp-msc-sm2s: Add device trees for MSC SM2S-IMX8PLUS SoM and carrier board 



Add device trees for one of a number of MSC's (parent company, Avnet)
variants of the SM2S-IMX8PLUS system on module along with the compatible
SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of SoMs use
the NXP i.MX8MP SoC and provide the SMARC module interface.

Signed-off-by: default avatarMartyn Welch <martyn.welch@collabora.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 4d50d2bf

arch/arm64/boot/dts/freescale/Makefile

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@@ -84,6 +84,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb

arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-14N0600E.dtsi

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// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (C) 2022 Avnet Embedded GmbH

 */

/dts-v1/;



#include "imx8mp-msc-sm2s.dtsi"



/ {

	memory@40000000 {

		device_type = "memory";

		reg = <0x0 0x40000000 0 0x80000000>; /* bank0, 2GiB */

	};

};



&cpu_alert0 {

	temperature = <95000>;

};



&cpu_crit0 {

	temperature = <105000>;

};



&soc_alert0 {

	temperature = <95000>;

};



&soc_crit0 {

	temperature = <105000>;

};



&tca6424 {

	gbe0-int-hog {

		gpio-hog;

		input;

		gpios = <3 GPIO_ACTIVE_LOW>;

	};



	gbe1-int-hog {

		gpio-hog;

		input;

		gpios = <4 GPIO_ACTIVE_LOW>;

	};



	cam2-rst-hog {

		gpio-hog;

		output-high;

		gpios = <9 GPIO_ACTIVE_LOW>;

	};



	cam2-pwr-hog {

		gpio-hog;

		output-high;

		gpios = <10 GPIO_ACTIVE_LOW>;

	};



	tpm-int-hog {

		gpio-hog;

		input;

		gpios = <13 GPIO_ACTIVE_LOW>;

	};



	wifi-int-hog {

		gpio-hog;

		input;

		gpios = <14 GPIO_ACTIVE_LOW>;

	};

};

arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts

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// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (C) 2022 Avnet Embedded GmbH

 */



/dts-v1/;



#include "imx8mp-msc-sm2s-14N0600E.dtsi"

#include <dt-bindings/clock/imx8mp-clock.h>

#include <dt-bindings/gpio/gpio.h>



/ {

	model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM";

	compatible = "avnet,sm2s-imx8mp-14N0600E-ep1",

		     "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp",

		     "fsl,imx8mp";

};



&flexcan1 {

	status = "okay";

};



&flexcan2 {

	status = "okay";

};



&usdhc2 {

	no-1-8-v;

};



&iomuxc {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_smarc_gpio>;



	pinctrl_smarc_gpio: smarcgpiosgrp {

		fsl,pins =

			<MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11	0x19>, /* GPIO0 */

			<MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0x19>, /* GPIO1 */

			<MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02	0x19>, /* GPIO2 */

			<MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03	0x19>, /* GPIO3 */

			<MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x19>, /* GPIO4 */

			<MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02	0x19>, /* GPIO5 */

			<MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x19>, /* GPIO6 */

			<MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10	0x19>, /* GPIO7 */

			<MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20	0x19>, /* GPIO8 */

			<MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x19>, /* GPIO9 */

			<MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x19>, /* GPIO10 */

			<MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x19>, /* GPIO11 */

			<MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19	0x19>, /* GPIO12 */

			<MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00	0x19>; /* GPIO13 */

	};

};

arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi

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