Commit f7289606 authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Greg Kroah-Hartman
Browse files

coresight: etm4x: Handle accesses to TRCSTALLCTLR 

TRCSTALLCTLR register is only implemented if

   TRCIDR3.STALLCTL == 0b1

Make sure the driver touches the register only it is implemented.

Link: https://lore.kernel.org/r/20210127184617.3684379-1-suzuki.poulose@arm.com


Cc: stable@vger.kernel.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-32-mathieu.poirier@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e5d51fbe

drivers/hwtracing/coresight/coresight-etm4x-core.c

+6 −3
Original line number Diff line number Diff line
@@ -306,6 +306,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) 
	etm4x_relaxed_write32(csa, 0x0, TRCAUXCTLR);

	etm4x_relaxed_write32(csa, config->eventctrl0, TRCEVENTCTL0R);

	etm4x_relaxed_write32(csa, config->eventctrl1, TRCEVENTCTL1R);

	if (drvdata->stallctl)

		etm4x_relaxed_write32(csa, config->stall_ctrl, TRCSTALLCTLR);

	etm4x_relaxed_write32(csa, config->ts_ctrl, TRCTSCTLR);

	etm4x_relaxed_write32(csa, config->syncfreq, TRCSYNCPR);
@@ -1463,6 +1464,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) 
	state->trcauxctlr = etm4x_read32(csa, TRCAUXCTLR);

	state->trceventctl0r = etm4x_read32(csa, TRCEVENTCTL0R);

	state->trceventctl1r = etm4x_read32(csa, TRCEVENTCTL1R);

	if (drvdata->stallctl)

		state->trcstallctlr = etm4x_read32(csa, TRCSTALLCTLR);

	state->trctsctlr = etm4x_read32(csa, TRCTSCTLR);

	state->trcsyncpr = etm4x_read32(csa, TRCSYNCPR);
@@ -1575,6 +1577,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) 
	etm4x_relaxed_write32(csa, state->trcauxctlr, TRCAUXCTLR);

	etm4x_relaxed_write32(csa, state->trceventctl0r, TRCEVENTCTL0R);

	etm4x_relaxed_write32(csa, state->trceventctl1r, TRCEVENTCTL1R);

	if (drvdata->stallctl)

		etm4x_relaxed_write32(csa, state->trcstallctlr, TRCSTALLCTLR);

	etm4x_relaxed_write32(csa, state->trctsctlr, TRCTSCTLR);

	etm4x_relaxed_write32(csa, state->trcsyncpr, TRCSYNCPR);

drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

+1 −1
Original line number Diff line number Diff line
@@ -389,7 +389,7 @@ static ssize_t mode_store(struct device *dev, 
		config->eventctrl1 &= ~BIT(12);



	/* bit[8], Instruction stall bit */

	if (config->mode & ETM_MODE_ISTALL_EN)

	if ((config->mode & ETM_MODE_ISTALL_EN) && (drvdata->stallctl == true))

		config->stall_ctrl |= BIT(8);

	else

		config->stall_ctrl &= ~BIT(8);