Commit f72ce14b authored by Tore Amundsen's avatar Tore Amundsen Committed by Tony Nguyen
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ixgbe: Correct BASE-BX10 compliance code 



SFF-8472 (section 5.4 Transceiver Compliance Codes) defines bit 6 as
BASE-BX10. Bit 6 means a value of 0x40 (decimal 64).

The current value in the source code is 0x64, which appears to be a
mix-up of hex and decimal values. A value of 0x64 (binary 01100100)
incorrectly sets bit 2 (1000BASE-CX) and bit 5 (100BASE-FX) as well.

Fixes: 1b43e0d2 ("ixgbe: Add 1000BASE-BX support")
Signed-off-by: default avatarTore Amundsen <tore@amundsen.org>
Reviewed-by: default avatarPaul Menzel <pmenzel@molgen.mpg.de>
Acked-by: default avatarErnesto Castellotti <ernesto@castellotti.net>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent 15915b43

drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h

+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ 
#define IXGBE_SFF_1GBASESX_CAPABLE		0x1

#define IXGBE_SFF_1GBASELX_CAPABLE		0x2

#define IXGBE_SFF_1GBASET_CAPABLE		0x8

#define IXGBE_SFF_BASEBX10_CAPABLE		0x64

#define IXGBE_SFF_BASEBX10_CAPABLE		0x40

#define IXGBE_SFF_10GBASESR_CAPABLE		0x10

#define IXGBE_SFF_10GBASELR_CAPABLE		0x20

#define IXGBE_SFF_SOFT_RS_SELECT_MASK		0x8