Commit f72e21ea authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-6.15-2025-03-14' of... 

Merge tag 'amd-drm-next-6.15-2025-03-14' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-next

amd-drm-next-6.15-2025-03-14:

amdgpu:
- GC 12.x DCC fixes
- VCN 2.5 fix
- Replay/PSR fixes
- HPD fixes
- DMUB fixes
- Backlight fixes
- DM suspend/resume cleanup
- Misc DC fixes
- HDCP UAF fix
- Misc code cleanups
- VCE 2.x fix
- Wedged event support
- GC 12.x PTE fixes
- Misc multimedia cap fixes
- Enable unique id support for GC 12.x
- XGMI code cleanup
- GC 11.x and 12.x MQD cleanups
- SMU 13.x updates
- SMU 14.x fan speed reporting
- Enable VCN activity reporting for additional chips
- SR-IOV fixes
- RAS fixes
- MES fixes

amdkfd:
- Dequeue wait count API cleanups
- Queue eviction cleanup fixes
- Retry fault fixes
- Dequeue retry timeout adjustments
- GC 12.x trap handler fixes
- GC 9.5.x updates

radeon:
- VCE command parser fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250314170618.3142042-1-alexander.deucher@amd.com
parents 0f044628 eb6cdfb8

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c

+1 −1
Original line number Diff line number Diff line
@@ -189,7 +189,7 @@ const struct kfd2kgd_calls aldebaran_kfd2kgd = { 
	.set_address_watch = kgd_gfx_aldebaran_set_address_watch,

	.clear_address_watch = kgd_gfx_v9_clear_address_watch,

	.get_iq_wait_times = kgd_gfx_v9_get_iq_wait_times,

	.build_grace_period_packet_info = kgd_gfx_v9_build_grace_period_packet_info,

	.build_dequeue_wait_counts_packet_info = kgd_gfx_v9_build_dequeue_wait_counts_packet_info,

	.program_trap_handler_settings = kgd_gfx_v9_program_trap_handler_settings,

	.hqd_get_pq_addr = kgd_gfx_v9_hqd_get_pq_addr,

	.hqd_reset = kgd_gfx_v9_hqd_reset,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

+1 −1
Original line number Diff line number Diff line
@@ -415,7 +415,7 @@ const struct kfd2kgd_calls arcturus_kfd2kgd = { 
	.set_address_watch = kgd_gfx_v9_set_address_watch,

	.clear_address_watch = kgd_gfx_v9_clear_address_watch,

	.get_iq_wait_times = kgd_gfx_v9_get_iq_wait_times,

	.build_grace_period_packet_info = kgd_gfx_v9_build_grace_period_packet_info,

	.build_dequeue_wait_counts_packet_info = kgd_gfx_v9_build_dequeue_wait_counts_packet_info,

	.get_cu_occupancy = kgd_gfx_v9_get_cu_occupancy,

	.program_trap_handler_settings = kgd_gfx_v9_program_trap_handler_settings,

	.hqd_get_pq_addr = kgd_gfx_v9_hqd_get_pq_addr,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

+2 −2
Original line number Diff line number Diff line
@@ -541,8 +541,8 @@ const struct kfd2kgd_calls gc_9_4_3_kfd2kgd = { 
	.get_cu_occupancy = kgd_gfx_v9_get_cu_occupancy,

	.program_trap_handler_settings =

				kgd_gfx_v9_program_trap_handler_settings,

	.build_grace_period_packet_info =

				kgd_gfx_v9_build_grace_period_packet_info,

	.build_dequeue_wait_counts_packet_info =

				kgd_gfx_v9_build_dequeue_wait_counts_packet_info,

	.get_iq_wait_times = kgd_gfx_v9_get_iq_wait_times,

	.enable_debug_trap = kgd_aldebaran_enable_debug_trap,

	.disable_debug_trap = kgd_gfx_v9_4_3_disable_debug_trap,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

+14 −14
Original line number Diff line number Diff line
@@ -1021,25 +1021,25 @@ void kgd_gfx_v10_get_iq_wait_times(struct amdgpu_device *adev, 
	*wait_times = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2));

}



void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev,

void kgd_gfx_v10_build_dequeue_wait_counts_packet_info(struct amdgpu_device *adev,

						uint32_t wait_times,

						uint32_t grace_period,

						uint32_t sch_wave,

						uint32_t que_sleep,

						uint32_t *reg_offset,

						uint32_t *reg_data)

{

	*reg_data = wait_times;



	/*

	 * The CP cannont handle a 0 grace period input and will result in

	 * an infinite grace period being set so set to 1 to prevent this.

	 */

	if (grace_period == 0)

		grace_period = 1;



	if (sch_wave)

		*reg_data = REG_SET_FIELD(*reg_data,

				CP_IQ_WAIT_TIME2,

				SCH_WAVE,

			grace_period);

				sch_wave);

	if (que_sleep)

		*reg_data = REG_SET_FIELD(*reg_data,

				CP_IQ_WAIT_TIME2,

				QUE_SLEEP,

				que_sleep);



	*reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2);

}
@@ -1115,7 +1115,7 @@ const struct kfd2kgd_calls gfx_v10_kfd2kgd = { 
	.set_address_watch = kgd_gfx_v10_set_address_watch,

	.clear_address_watch = kgd_gfx_v10_clear_address_watch,

	.get_iq_wait_times = kgd_gfx_v10_get_iq_wait_times,

	.build_grace_period_packet_info = kgd_gfx_v10_build_grace_period_packet_info,

	.build_dequeue_wait_counts_packet_info = kgd_gfx_v10_build_dequeue_wait_counts_packet_info,

	.program_trap_handler_settings = program_trap_handler_settings,

	.hqd_get_pq_addr = kgd_gfx_v10_hqd_get_pq_addr,

	.hqd_reset = kgd_gfx_v10_hqd_reset,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h

+3 −2
Original line number Diff line number Diff line
@@ -51,9 +51,10 @@ uint32_t kgd_gfx_v10_clear_address_watch(struct amdgpu_device *adev, 
void kgd_gfx_v10_get_iq_wait_times(struct amdgpu_device *adev,

				uint32_t *wait_times,

				uint32_t inst);

void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev,

void kgd_gfx_v10_build_dequeue_wait_counts_packet_info(struct amdgpu_device *adev,

					       uint32_t wait_times,

					       uint32_t grace_period,

					       uint32_t sch_wave,

					       uint32_t que_sleep,

					       uint32_t *reg_offset,

					       uint32_t *reg_data);

uint64_t kgd_gfx_v10_hqd_get_pq_addr(struct amdgpu_device *adev,