Loading arch/arc/boot/dts/axc001.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -95,6 +95,6 @@ memory { #size-cells = <1>; ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; reg = <0x00000000 0x20000000>; /* 512MiB */ reg = <0x80000000 0x20000000>; /* 512MiB */ }; }; arch/arc/boot/dts/axc003.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -98,6 +98,6 @@ memory { #size-cells = <1>; ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; reg = <0x00000000 0x20000000>; /* 512MiB */ reg = <0x80000000 0x20000000>; /* 512MiB */ }; }; arch/arc/boot/dts/axc003_idu.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -121,6 +121,6 @@ memory { #size-cells = <1>; ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; reg = <0x00000000 0x20000000>; /* 512MiB */ reg = <0x80000000 0x20000000>; /* 512MiB */ }; }; arch/arc/boot/dts/skeleton.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -32,6 +32,6 @@ cpu@0 { memory { device_type = "memory"; reg = <0x00000000 0x10000000>; /* 256M */ reg = <0x80000000 0x10000000>; /* 256M */ }; }; arch/arc/boot/dts/vdk_axc003.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -56,6 +56,6 @@ memory { #size-cells = <1>; ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; reg = <0x00000000 0x20000000>; /* 512MiB */ reg = <0x80000000 0x20000000>; /* 512MiB */ }; }; Loading
arch/arc/boot/dts/axc001.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -95,6 +95,6 @@ memory { #size-cells = <1>; ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; reg = <0x00000000 0x20000000>; /* 512MiB */ reg = <0x80000000 0x20000000>; /* 512MiB */ }; };
arch/arc/boot/dts/axc003.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -98,6 +98,6 @@ memory { #size-cells = <1>; ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; reg = <0x00000000 0x20000000>; /* 512MiB */ reg = <0x80000000 0x20000000>; /* 512MiB */ }; };
arch/arc/boot/dts/axc003_idu.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -121,6 +121,6 @@ memory { #size-cells = <1>; ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; reg = <0x00000000 0x20000000>; /* 512MiB */ reg = <0x80000000 0x20000000>; /* 512MiB */ }; };
arch/arc/boot/dts/skeleton.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -32,6 +32,6 @@ cpu@0 { memory { device_type = "memory"; reg = <0x00000000 0x10000000>; /* 256M */ reg = <0x80000000 0x10000000>; /* 256M */ }; };
arch/arc/boot/dts/vdk_axc003.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -56,6 +56,6 @@ memory { #size-cells = <1>; ranges = <0x00000000 0x80000000 0x40000000>; device_type = "memory"; reg = <0x00000000 0x20000000>; /* 512MiB */ reg = <0x80000000 0x20000000>; /* 512MiB */ }; };