Commit f7859a03 authored by Bence Csókás's avatar Bence Csókás Committed by Jakub Kicinski
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net: fec: Refactor: Replace FEC_ENET_FCE with FEC_RCR_FLOWCTL 



FEC_ENET_FCE is the Flow Control Enable bit (bit 5) of the RCR.
This is now defined as FEC_RCR_FLOWCTL.

Signed-off-by: default avatarCsókás Bence <csokas.bence@prolan.hu>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20240212153717.10023-2-csokas.bence@prolan.hu


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent ff049886

drivers/net/ethernet/freescale/fec_main.c

+2 −4
Original line number Diff line number Diff line
@@ -85,8 +85,6 @@ static int fec_enet_xdp_tx_xmit(struct fec_enet_private *fep, 


static const u16 fec_enet_vlan_pri_to_queue[8] = {0, 0, 1, 1, 1, 2, 2, 2};



/* Pause frame feild and FIFO threshold */

#define FEC_ENET_FCE	(1 << 5)

#define FEC_ENET_RSEM_V	0x84

#define FEC_ENET_RSFL_V	16

#define FEC_ENET_RAEM_V	0x8
@@ -1196,7 +1194,7 @@ fec_restart(struct net_device *ndev) 
	if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) ||

	    ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) &&

	     ndev->phydev && ndev->phydev->pause)) {

		rcntl |= FEC_ENET_FCE;

		rcntl |= FEC_RCR_FLOWCTL;



		/* set FIFO threshold parameter to reduce overrun */

		writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
@@ -1207,7 +1205,7 @@ fec_restart(struct net_device *ndev) 
		/* OPD */

		writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);

	} else {

		rcntl &= ~FEC_ENET_FCE;

		rcntl &= ~FEC_RCR_FLOWCTL;

	}

#endif /* !defined(CONFIG_M5272) */