Commit f78835d1 authored by Alexander Stein's avatar Alexander Stein Committed by Shawn Guo
Browse files

arm64: dts: imx8mp: reparent MEDIA_MIPI_PHY1_REF to CLK_24M 



This is already done in dsi node, introduced in commit eda09fe1
("arm64: dts: imx8mp: Add display pipeline components").
This needs to be applied to csi nodes as well or the clock might be busy
if both csi and dsi nodes are enabled.
Fixes error:
 clk: failed to reparent media_mipi_phy1_ref to osc_24m: -16

Signed-off-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent c8d29601

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+8 −4
Original line number Diff line number Diff line
@@ -1636,8 +1636,10 @@ mipi_csi_0: csi@32e40000 { 
					 <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,

					 <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;

				clock-names = "pclk", "wrap", "phy", "axi";

				assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>;

				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;

				assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>,

						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;

				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,

							 <&clk IMX8MP_CLK_24M>;

				assigned-clock-rates = <500000000>;

				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;

				status = "disabled";
@@ -1670,8 +1672,10 @@ mipi_csi_1: csi@32e50000 { 
					 <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,

					 <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;

				clock-names = "pclk", "wrap", "phy", "axi";

				assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>;

				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;

				assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>,

						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;

				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,

							 <&clk IMX8MP_CLK_24M>;

				assigned-clock-rates = <266000000>;

				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_2>;

				status = "disabled";