Commit f7a6bed9 authored by Brian Masney's avatar Brian Masney
Browse files

clk: x86: cgu: convert from round_rate() to determine_rate() 



The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: default avatarBrian Masney <bmasney@redhat.com>
parent d4c515a2

drivers/clk/x86/clk-cgu.c

+20 −15
Original line number Diff line number Diff line
@@ -132,14 +132,15 @@ lgm_clk_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) 
				   divider->flags, divider->width);

}



static long

lgm_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,

			   unsigned long *prate)

static int lgm_clk_divider_determine_rate(struct clk_hw *hw,

					  struct clk_rate_request *req)

{

	struct lgm_clk_divider *divider = to_lgm_clk_divider(hw);



	return divider_round_rate(hw, rate, prate, divider->table,

	req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, divider->table,

				       divider->width, divider->flags);



	return 0;

}



static int
@@ -182,7 +183,7 @@ static void lgm_clk_divider_disable(struct clk_hw *hw) 


static const struct clk_ops lgm_clk_divider_ops = {

	.recalc_rate = lgm_clk_divider_recalc_rate,

	.round_rate = lgm_clk_divider_round_rate,

	.determine_rate = lgm_clk_divider_determine_rate,

	.set_rate = lgm_clk_divider_set_rate,

	.enable = lgm_clk_divider_enable,

	.disable = lgm_clk_divider_disable,
@@ -487,15 +488,14 @@ lgm_clk_ddiv_set_rate(struct clk_hw *hw, unsigned long rate, 
	return 0;

}



static long

lgm_clk_ddiv_round_rate(struct clk_hw *hw, unsigned long rate,

			unsigned long *prate)

static int lgm_clk_ddiv_determine_rate(struct clk_hw *hw,

				       struct clk_rate_request *req)

{

	struct lgm_clk_ddiv *ddiv = to_lgm_clk_ddiv(hw);

	u32 div, ddiv1, ddiv2;

	u64 rate64;



	div = DIV_ROUND_CLOSEST_ULL((u64)*prate, rate);

	div = DIV_ROUND_CLOSEST_ULL((u64)req->best_parent_rate, req->rate);



	/* if predivide bit is enabled, modify div by factor of 2.5 */

	if (lgm_get_clk_val(ddiv->membase, ddiv->reg, ddiv->shift2, 1)) {
@@ -503,14 +503,17 @@ lgm_clk_ddiv_round_rate(struct clk_hw *hw, unsigned long rate, 
		div = DIV_ROUND_CLOSEST_ULL((u64)div, 5);

	}



	if (div <= 0)

		return *prate;

	if (div <= 0) {

		req->rate = req->best_parent_rate;



		return 0;

	}



	if (lgm_clk_get_ddiv_val(div, &ddiv1, &ddiv2) != 0)

		if (lgm_clk_get_ddiv_val(div + 1, &ddiv1, &ddiv2) != 0)

			return -EINVAL;



	rate64 = *prate;

	rate64 = req->best_parent_rate;

	do_div(rate64, ddiv1);

	do_div(rate64, ddiv2);
@@ -520,7 +523,9 @@ lgm_clk_ddiv_round_rate(struct clk_hw *hw, unsigned long rate, 
		rate64 = DIV_ROUND_CLOSEST_ULL(rate64, 5);

	}



	return rate64;

	req->rate = rate64;



	return 0;

}



static const struct clk_ops lgm_clk_ddiv_ops = {
@@ -528,7 +533,7 @@ static const struct clk_ops lgm_clk_ddiv_ops = { 
	.enable	= lgm_clk_ddiv_enable,

	.disable = lgm_clk_ddiv_disable,

	.set_rate = lgm_clk_ddiv_set_rate,

	.round_rate = lgm_clk_ddiv_round_rate,

	.determine_rate = lgm_clk_ddiv_determine_rate,

};



int lgm_clk_register_ddiv(struct lgm_clk_provider *ctx,