Commit f7be784c authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-xe-fixes-2025-05-09' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes 



Driver Changes:
- Prevent PF queue overflow
- Hold all forcewake during mocs test
- Remove GSC flush on reset path
- Fix forcewake put on error path
- Fix runtime warning when building without svm

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/jffqa56f2zp4i5ztz677cdspgxhnw7qfop3dd3l2epykfpfvza@q2nw6wapsphz
parents 80e12f3e 564467e9

drivers/gpu/drm/xe/tests/xe_mocs.c

+5 −2
Original line number Diff line number Diff line
@@ -46,8 +46,11 @@ static void read_l3cc_table(struct xe_gt *gt, 
	unsigned int fw_ref, i;

	u32 reg_val;



	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);

	KUNIT_ASSERT_NE_MSG(test, fw_ref, 0, "Forcewake Failed.\n");

	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);

	if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {

		xe_force_wake_put(gt_to_fw(gt), fw_ref);

		KUNIT_ASSERT_TRUE_MSG(test, true, "Forcewake Failed.\n");

	}



	for (i = 0; i < info->num_mocs_regs; i++) {

		if (!(i & 1)) {

drivers/gpu/drm/xe/xe_gsc.c

+22 −0
Original line number Diff line number Diff line
@@ -555,6 +555,28 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc) 
		flush_work(&gsc->work);

}



void xe_gsc_stop_prepare(struct xe_gsc *gsc)

{

	struct xe_gt *gt = gsc_to_gt(gsc);

	int ret;



	if (!xe_uc_fw_is_loadable(&gsc->fw) || xe_uc_fw_is_in_error_state(&gsc->fw))

		return;



	xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GSC);



	/*

	 * If the GSC FW load or the proxy init are interrupted, the only way

	 * to recover it is to do an FLR and reload the GSC from scratch.

	 * Therefore, let's wait for the init to complete before stopping

	 * operations. The proxy init is the last step, so we can just wait on

	 * that

	 */

	ret = xe_gsc_wait_for_proxy_init_done(gsc);

	if (ret)

		xe_gt_err(gt, "failed to wait for GSC init completion before uc stop\n");

}



/*

 * wa_14015076503: if the GSC FW is loaded, we need to alert it before doing a

 * GSC engine reset by writing a notification bit in the GS1 register and then

drivers/gpu/drm/xe/xe_gsc.h

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ struct xe_hw_engine; 
int xe_gsc_init(struct xe_gsc *gsc);

int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);

void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);

void xe_gsc_stop_prepare(struct xe_gsc *gsc);

void xe_gsc_load_start(struct xe_gsc *gsc);

void xe_gsc_hwe_irq_handler(struct xe_hw_engine *hwe, u16 intr_vec);

drivers/gpu/drm/xe/xe_gsc_proxy.c

+11 −0
Original line number Diff line number Diff line
@@ -71,6 +71,17 @@ bool xe_gsc_proxy_init_done(struct xe_gsc *gsc) 
	       HECI1_FWSTS1_PROXY_STATE_NORMAL;

}



int xe_gsc_wait_for_proxy_init_done(struct xe_gsc *gsc)

{

	struct xe_gt *gt = gsc_to_gt(gsc);



	/* Proxy init can take up to 500ms, so wait double that for safety */

	return xe_mmio_wait32(&gt->mmio, HECI_FWSTS1(MTL_GSC_HECI1_BASE),

			      HECI1_FWSTS1_CURRENT_STATE,

			      HECI1_FWSTS1_PROXY_STATE_NORMAL,

			      USEC_PER_SEC, NULL, false);

}



static void __gsc_proxy_irq_rmw(struct xe_gsc *gsc, u32 clr, u32 set)

{

	struct xe_gt *gt = gsc_to_gt(gsc);

drivers/gpu/drm/xe/xe_gsc_proxy.h

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ struct xe_gsc; 


int xe_gsc_proxy_init(struct xe_gsc *gsc);

bool xe_gsc_proxy_init_done(struct xe_gsc *gsc);

int xe_gsc_wait_for_proxy_init_done(struct xe_gsc *gsc);

int xe_gsc_proxy_start(struct xe_gsc *gsc);



int xe_gsc_proxy_request_handler(struct xe_gsc *gsc);