Commit f92dbc38 authored by Eugene Lepshy's avatar Eugene Lepshy Committed by Bjorn Andersson
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arm64: dts: qcom: sc7280: Add 0x81 Adreno speed bin 



A642L (speedbin 0x81) uses index 4, so this commit sets the fourth bit
for A642L supported opps.

Signed-off-by: default avatarEugene Lepshy <fekz115@gmail.com>
Signed-off-by: default avatarDanila Tikhonov <danila@jiaxyga.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20241014194825.44406-2-danila@jiaxyga.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 9c4cd0ae

arch/arm64/boot/dts/qcom/sc7280.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -2841,14 +2841,14 @@ opp-315000000 { 
					opp-hz = /bits/ 64 <315000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;

					opp-peak-kBps = <1804000>;

					opp-supported-hw = <0x07>;

					opp-supported-hw = <0x17>;

				};



				opp-450000000 {

					opp-hz = /bits/ 64 <450000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_SVS>;

					opp-peak-kBps = <4068000>;

					opp-supported-hw = <0x07>;

					opp-supported-hw = <0x17>;

				};



				/* Only applicable for SKUs which has 550Mhz as Fmax */
@@ -2863,14 +2863,14 @@ opp-550000000-1 { 
					opp-hz = /bits/ 64 <550000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;

					opp-peak-kBps = <6832000>;

					opp-supported-hw = <0x06>;

					opp-supported-hw = <0x16>;

				};



				opp-608000000 {

					opp-hz = /bits/ 64 <608000000>;

					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;

					opp-peak-kBps = <8368000>;

					opp-supported-hw = <0x06>;

					opp-supported-hw = <0x16>;

				};



				opp-700000000 {