Commit f9993efe authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/vcn4.0.5: add set_pg_state callback 



Rework the code as a vcn instance callback.

Reviewed-by: default avatarBoyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 39fb77a8

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

+18 −15
Original line number Diff line number Diff line
@@ -95,9 +95,8 @@ static int amdgpu_ih_clientid_vcns[] = { 


static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev);

static void vcn_v4_0_5_set_irq_funcs(struct amdgpu_device *adev);

static int vcn_v4_0_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,

						 enum amd_powergating_state state,

						 int i);

static int vcn_v4_0_5_set_pg_state(struct amdgpu_vcn_inst *vinst,

				   enum amd_powergating_state state);

static int vcn_v4_0_5_set_powergating_state(struct amdgpu_ip_block *ip_block,

					    enum amd_powergating_state state);

static int vcn_v4_0_5_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,
@@ -124,6 +123,8 @@ static int vcn_v4_0_5_early_init(struct amdgpu_ip_block *ip_block) 
	vcn_v4_0_5_set_irq_funcs(adev);



	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {

		adev->vcn.inst[i].set_pg_state = vcn_v4_0_5_set_pg_state;



		r = amdgpu_vcn_early_init(adev, i);

		if (r)

			return r;
@@ -317,16 +318,18 @@ static int vcn_v4_0_5_hw_fini(struct amdgpu_ip_block *ip_block) 
	int i;



	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {

		struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];



		if (adev->vcn.harvest_config & (1 << i))

			continue;



		cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);

		cancel_delayed_work_sync(&vinst->idle_work);



		if (!amdgpu_sriov_vf(adev)) {

			if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||

			    (adev->vcn.inst[i].cur_state != AMD_PG_STATE_GATE &&

			    (vinst->cur_state != AMD_PG_STATE_GATE &&

			     RREG32_SOC15(VCN, i, regUVD_STATUS))) {

				vcn_v4_0_5_set_powergating_state_inst(ip_block, AMD_PG_STATE_GATE, i);

				vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);

			}

		}

	}
@@ -1563,15 +1566,12 @@ static int vcn_v4_0_5_set_clockgating_state(struct amdgpu_ip_block *ip_block, 
	return 0;

}



static int vcn_v4_0_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_block,

						 enum amd_powergating_state state,

						 int i)

static int vcn_v4_0_5_set_pg_state(struct amdgpu_vcn_inst *vinst,

				   enum amd_powergating_state state)

{

	struct amdgpu_device *adev = ip_block->adev;

	struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];

	int ret = 0;



	if (state == adev->vcn.inst[i].cur_state)

	if (state == vinst->cur_state)

		return 0;



	if (state == AMD_PG_STATE_GATE)
@@ -1580,7 +1580,7 @@ static int vcn_v4_0_5_set_powergating_state_inst(struct amdgpu_ip_block *ip_bloc 
		ret = vcn_v4_0_5_start(vinst);



	if (!ret)

		adev->vcn.inst[i].cur_state = state;

		vinst->cur_state = state;



	return ret;

}
@@ -1599,8 +1599,11 @@ static int vcn_v4_0_5_set_powergating_state(struct amdgpu_ip_block *ip_block, 
	struct amdgpu_device *adev = ip_block->adev;

	int ret = 0, i;



	for (i = 0; i < adev->vcn.num_vcn_inst; ++i)

		vcn_v4_0_5_set_powergating_state_inst(ip_block, state, i);

	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {

		struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];



		ret |= vinst->set_pg_state(vinst, state);

	}



	return ret;

}