Commit f99b121c authored by Frank Li's avatar Frank Li Committed by Lorenzo Pieralisi
Browse files

PCI: imx6: Simplify configure_type() by using mode_off and mode_mask 

Add drvdata::mode_off and drvdata::mode_mask to simplify
imx6_pcie_configure_type() logic.

Link: https://lore.kernel.org/r/20240220161924.3871774-6-Frank.Li@nxp.com


Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent d99aa8d3

drivers/pci/controller/dwc/pci-imx6.c

+39 −20
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ enum imx6_pcie_variants { 


#define IMX6_PCIE_MAX_CLKS       6



#define IMX6_PCIE_MAX_INSTANCES			2

struct imx6_pcie_drvdata {

	enum imx6_pcie_variants variant;

	enum dw_pcie_device_mode mode;
@@ -78,6 +79,8 @@ struct imx6_pcie_drvdata { 
	const u32 clks_cnt;

	const u32 ltssm_off;

	const u32 ltssm_mask;

	const u32 mode_off[IMX6_PCIE_MAX_INSTANCES];

	const u32 mode_mask[IMX6_PCIE_MAX_INSTANCES];

};



struct imx6_pcie {
@@ -174,32 +177,24 @@ static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) 


static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie)

{

	unsigned int mask, val, mode;

	const struct imx6_pcie_drvdata *drvdata = imx6_pcie->drvdata;

	unsigned int mask, val, mode, id;



	if (imx6_pcie->drvdata->mode == DW_PCIE_EP_TYPE)

	if (drvdata->mode == DW_PCIE_EP_TYPE)

		mode = PCI_EXP_TYPE_ENDPOINT;

	else

		mode = PCI_EXP_TYPE_ROOT_PORT;



	switch (imx6_pcie->drvdata->variant) {

	case IMX8MQ:

	case IMX8MQ_EP:

		if (imx6_pcie->controller_id == 1) {

			mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;

			val  = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,

					  mode);

		} else {

			mask = IMX6Q_GPR12_DEVICE_TYPE;

			val  = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);

		}

		break;

	default:

		mask = IMX6Q_GPR12_DEVICE_TYPE;

		val  = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);

		break;

	}

	id = imx6_pcie->controller_id;



	/* If mode_mask[id] is zero, means each controller have its individual gpr */

	if (!drvdata->mode_mask[id])

		id = 0;



	mask = drvdata->mode_mask[id];

	val = mode << (ffs(mask) - 1);



	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);

	regmap_update_bits(imx6_pcie->iomuxc_gpr, drvdata->mode_off[id], mask, val);

}



static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val)
@@ -1384,6 +1379,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.clks_cnt = ARRAY_SIZE(imx6q_clks),

		.ltssm_off = IOMUXC_GPR12,

		.ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2,

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

	},

	[IMX6SX] = {

		.variant = IMX6SX,
@@ -1395,6 +1392,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.clks_cnt = ARRAY_SIZE(imx6sx_clks),

		.ltssm_off = IOMUXC_GPR12,

		.ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2,

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

	},

	[IMX6QP] = {

		.variant = IMX6QP,
@@ -1407,6 +1406,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.clks_cnt = ARRAY_SIZE(imx6q_clks),

		.ltssm_off = IOMUXC_GPR12,

		.ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2,

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

	},

	[IMX7D] = {

		.variant = IMX7D,
@@ -1416,6 +1417,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.gpr = "fsl,imx7d-iomuxc-gpr",

		.clk_names = imx6q_clks,

		.clks_cnt = ARRAY_SIZE(imx6q_clks),

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

	},

	[IMX8MQ] = {

		.variant = IMX8MQ,
@@ -1424,6 +1427,10 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.gpr = "fsl,imx8mq-iomuxc-gpr",

		.clk_names = imx8mq_clks,

		.clks_cnt = ARRAY_SIZE(imx8mq_clks),

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

		.mode_off[1] = IOMUXC_GPR12,

		.mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,

	},

	[IMX8MM] = {

		.variant = IMX8MM,
@@ -1433,6 +1440,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.gpr = "fsl,imx8mm-iomuxc-gpr",

		.clk_names = imx8mm_clks,

		.clks_cnt = ARRAY_SIZE(imx8mm_clks),

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

	},

	[IMX8MP] = {

		.variant = IMX8MP,
@@ -1442,6 +1451,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.gpr = "fsl,imx8mp-iomuxc-gpr",

		.clk_names = imx8mm_clks,

		.clks_cnt = ARRAY_SIZE(imx8mm_clks),

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

	},

	[IMX8MQ_EP] = {

		.variant = IMX8MQ_EP,
@@ -1451,6 +1462,10 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.gpr = "fsl,imx8mq-iomuxc-gpr",

		.clk_names = imx8mq_clks,

		.clks_cnt = ARRAY_SIZE(imx8mq_clks),

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

		.mode_off[1] = IOMUXC_GPR12,

		.mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,

	},

	[IMX8MM_EP] = {

		.variant = IMX8MM_EP,
@@ -1459,6 +1474,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.gpr = "fsl,imx8mm-iomuxc-gpr",

		.clk_names = imx8mm_clks,

		.clks_cnt = ARRAY_SIZE(imx8mm_clks),

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

	},

	[IMX8MP_EP] = {

		.variant = IMX8MP_EP,
@@ -1467,6 +1484,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { 
		.gpr = "fsl,imx8mp-iomuxc-gpr",

		.clk_names = imx8mm_clks,

		.clks_cnt = ARRAY_SIZE(imx8mm_clks),

		.mode_off[0] = IOMUXC_GPR12,

		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,

	},

};