Commit f9a5b34f authored by Cosmin Ratiu's avatar Cosmin Ratiu Committed by Leon Romanovsky
Browse files

net/mlx5: ifc: Reorganize mlx5_ifc_flow_table_context_bits 



The nested union at the end is not in the same style as the rest of the
code, so un-nest it to make the style uniformly applied again.

Signed-off-by: default avatarCosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20241204220931.254964-2-tariqt@nvidia.com


Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent 40384c84

include/linux/mlx5/mlx5_ifc.h

+17 −13
Original line number Diff line number Diff line
@@ -6324,6 +6324,20 @@ struct mlx5_ifc_modify_other_hca_cap_in_bits { 
	struct     mlx5_ifc_other_hca_cap_bits other_capability;

};



struct mlx5_ifc_sw_owner_icm_root_params_bits {

	u8         sw_owner_icm_root_1[0x40];



	u8         sw_owner_icm_root_0[0x40];

};



struct mlx5_ifc_rtc_params_bits {

	u8         rtc_id_0[0x20];



	u8         rtc_id_1[0x20];



	u8         reserved_at_40[0x40];

};



struct mlx5_ifc_flow_table_context_bits {

	u8         reformat_en[0x1];

	u8         decap_en[0x1];
@@ -6342,20 +6356,10 @@ struct mlx5_ifc_flow_table_context_bits { 
	u8         lag_master_next_table_id[0x18];



	u8         reserved_at_60[0x60];

	union {

		struct {

			u8         sw_owner_icm_root_1[0x40];



			u8         sw_owner_icm_root_0[0x40];

		} sws;

		struct {

			u8         rtc_id_0[0x20];



			u8         rtc_id_1[0x20];



			u8         reserved_at_100[0x40];



		} hws;

	union {

		struct mlx5_ifc_sw_owner_icm_root_params_bits sws;

		struct mlx5_ifc_rtc_params_bits hws;

	};

};