Commit f9a7f700 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8350: describe all PCI MSI interrupts 



Each group of MSI interrupts is mapped to the separate host interrupt.
Describe each of interrupts in the device tree for PCIe hosts.  Not
tested on hardware.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240126-b4-dt-bindings-pci-qcom-split-dts-v2-3-0bb067f73adb@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 534ecb50

arch/arm64/boot/dts/qcom/sm8350.dtsi

+16 −2
Original line number Diff line number Diff line
@@ -1611,8 +1611,22 @@ pcie1: pcie@1c08000 { 
			ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,

				 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;



			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "msi";

			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "msi0",

					  "msi1",

					  "msi2",

					  "msi3",

					  "msi4",

					  "msi5",

					  "msi6",

					  "msi7";

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0x7>;

			interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */