Commit f9bcd59a authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe/sriov: Convert register access to use xe_mmio 



Stop using GT pointers for register access.

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-82-matthew.d.roper@intel.com
parent 498ecc54

drivers/gpu/drm/xe/xe_gt_sriov_pf.c

+3 −3
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ static bool pf_needs_enable_ggtt_guest_update(struct xe_device *xe) 


static void pf_enable_ggtt_guest_update(struct xe_gt *gt)

{

	xe_mmio_write32(gt, VIRTUAL_CTRL_REG, GUEST_GTT_UPDATE_EN);

	xe_mmio_write32(&gt->mmio, VIRTUAL_CTRL_REG, GUEST_GTT_UPDATE_EN);

}



/**
@@ -116,13 +116,13 @@ static void pf_clear_vf_scratch_regs(struct xe_gt *gt, unsigned int vfid) 
		count = MED_VF_SW_FLAG_COUNT;

		for (n = 0; n < count; n++) {

			scratch = xe_reg_vf_to_pf(MED_VF_SW_FLAG(n), vfid, stride);

			xe_mmio_write32(gt, scratch, 0);

			xe_mmio_write32(&gt->mmio, scratch, 0);

		}

	} else {

		count = VF_SW_FLAG_COUNT;

		for (n = 0; n < count; n++) {

			scratch = xe_reg_vf_to_pf(VF_SW_FLAG(n), vfid, stride);

			xe_mmio_write32(gt, scratch, 0);

			xe_mmio_write32(&gt->mmio, scratch, 0);

		}

	}

}

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

+3 −3
Original line number Diff line number Diff line
@@ -237,7 +237,7 @@ static void read_many(struct xe_gt *gt, unsigned int count, 
		      const struct xe_reg *regs, u32 *values)

{

	while (count--)

		*values++ = xe_mmio_read32(gt, *regs++);

		*values++ = xe_mmio_read32(&gt->mmio, *regs++);

}



static void pf_prepare_runtime_info(struct xe_gt *gt)
@@ -402,7 +402,7 @@ static int pf_service_runtime_query(struct xe_gt *gt, u32 start, u32 limit, 


	for (i = 0; i < count; ++i, ++data) {

		addr = runtime->regs[start + i].addr;

		data->offset = xe_mmio_adjusted_addr(gt, addr);

		data->offset = xe_mmio_adjusted_addr(&gt->mmio, addr);

		data->value = runtime->values[start + i];

	}
@@ -513,7 +513,7 @@ int xe_gt_sriov_pf_service_print_runtime(struct xe_gt *gt, struct drm_printer *p 


	for (; size--; regs++, values++) {

		drm_printf(p, "reg[%#x] = %#x\n",

			   xe_mmio_adjusted_addr(gt, regs->addr), *values);

			   xe_mmio_adjusted_addr(&gt->mmio, regs->addr), *values);

	}



	return 0;

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

+2 −2
Original line number Diff line number Diff line
@@ -881,7 +881,7 @@ static struct vf_runtime_reg *vf_lookup_reg(struct xe_gt *gt, u32 addr) 
 */

u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg)

{

	u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);

	u32 addr = xe_mmio_adjusted_addr(&gt->mmio, reg.addr);

	struct vf_runtime_reg *rr;



	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
@@ -917,7 +917,7 @@ u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg) 
 */

void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val)

{

	u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);

	u32 addr = xe_mmio_adjusted_addr(&gt->mmio, reg.addr);



	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));

	xe_gt_assert(gt, !reg.vf);

drivers/gpu/drm/xe/xe_sriov.c

+1 −1
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ const char *xe_sriov_mode_to_string(enum xe_sriov_mode mode) 


static bool test_is_vf(struct xe_device *xe)

{

	u32 value = xe_mmio_read32(xe_root_mmio_gt(xe), VF_CAP_REG);

	u32 value = xe_mmio_read32(xe_root_tile_mmio(xe), VF_CAP_REG);



	return value & VF_CAP;

}