Commit f9cb5e01 authored by Sasha Neftin's avatar Sasha Neftin Committed by Tony Nguyen
Browse files

igc: Move the MULTI GBT AN Control Register to _regs file 



MULTI GBT AN Control Register is IEEE Standard Register 7.32 (not a mask).
The right place should be in igc_reg.h file. In accordance with the
registers naming convention added IGC_' prefix.

Signed-off-by: default avatarSasha Neftin <sasha.neftin@intel.com>
Reviewed-by: default avatarPaul Menzel <pmenzel@molgen.mpg.de>
Tested-by: default avatarAvigail Dahan <avigailx.dahan@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent ad7dffae

drivers/net/ethernet/intel/igc/igc_defines.h

+0 −1
Original line number Diff line number Diff line
@@ -178,7 +178,6 @@ 


/* PHY GPY 211 registers */

#define STANDARD_AN_REG_MASK	0x0007 /* MMD */

#define ANEG_MULTIGBT_AN_CTRL	0x0020 /* MULTI GBT AN Control Register */

#define MMD_DEVADDR_SHIFT	16     /* Shift MMD to higher bits */

#define CR_2500T_FD_CAPS	0x0080 /* Advertise 2500T FD capability */

drivers/net/ethernet/intel/igc/igc_phy.c

+2 −2
Original line number Diff line number Diff line
@@ -240,7 +240,7 @@ static s32 igc_phy_setup_autoneg(struct igc_hw *hw) 
		/* Read the MULTI GBT AN Control Register - reg 7.32 */

		ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<

					    MMD_DEVADDR_SHIFT) |

					    ANEG_MULTIGBT_AN_CTRL,

					    IGC_ANEG_MULTIGBT_AN_CTRL,

					    &aneg_multigbt_an_ctrl);



		if (ret_val)
@@ -380,7 +380,7 @@ static s32 igc_phy_setup_autoneg(struct igc_hw *hw) 
		ret_val = phy->ops.write_reg(hw,

					     (STANDARD_AN_REG_MASK <<

					     MMD_DEVADDR_SHIFT) |

					     ANEG_MULTIGBT_AN_CTRL,

					     IGC_ANEG_MULTIGBT_AN_CTRL,

					     aneg_multigbt_an_ctrl);



	return ret_val;

drivers/net/ethernet/intel/igc/igc_regs.h

+3 −0
Original line number Diff line number Diff line
@@ -310,6 +310,9 @@ 
#define IGC_IPCNFG	0x0E38 /* Internal PHY Configuration */

#define IGC_EEE_SU	0x0E34 /* EEE Setup */



/* MULTI GBT AN Control Register - reg. 7.32 */

#define IGC_ANEG_MULTIGBT_AN_CTRL	0x0020



/* EEE ANeg Advertisement Register - reg 7.60 and reg 7.62 */

#define IGC_ANEG_EEE_AB1	0x003c

#define IGC_ANEG_EEE_AB2	0x003e