Commit fa599b8c authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe: Populate GT's mmio iomap from tile during init 



Each GT should share the same register iomap as its parent tile.  Future
patches will switch to access the iomap through the GT's mmio substruct
rather than through the tile.

Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-50-matthew.d.roper@intel.com
parent 9d383916

drivers/gpu/drm/xe/xe_pci.c

+4 −0
Original line number Diff line number Diff line
@@ -711,6 +711,8 @@ static int xe_info_init(struct xe_device *xe, 
		gt->info.type = XE_GT_TYPE_MAIN;

		gt->info.has_indirect_ring_state = graphics_desc->has_indirect_ring_state;

		gt->info.engine_mask = graphics_desc->hw_engine_mask;

		gt->mmio.regs = tile->mmio.regs;

		gt->mmio.regs_size = tile->mmio.regs_size;

		if (MEDIA_VER(xe) < 13 && media_desc)

			gt->info.engine_mask |= media_desc->hw_engine_mask;
@@ -729,6 +731,8 @@ static int xe_info_init(struct xe_device *xe, 
		gt->info.type = XE_GT_TYPE_MEDIA;

		gt->info.has_indirect_ring_state = media_desc->has_indirect_ring_state;

		gt->info.engine_mask = media_desc->hw_engine_mask;

		gt->mmio.regs = tile->mmio.regs;

		gt->mmio.regs_size = tile->mmio.regs_size;

		gt->mmio.adj_offset = MEDIA_GT_GSI_OFFSET;

		gt->mmio.adj_limit = MEDIA_GT_GSI_LENGTH;