Commit fa7cad49 authored by Duncan Ma's avatar Duncan Ma Committed by Alex Deucher
Browse files

drm/amd/display: Add eDP AUXless ALPM 



[Why & How]
Add AUX-less ALPM capability check and initialization

Reviewed-by: default avatarCharlene Liu <charlene.liu@amd.com>
Signed-off-by: default avatarDuncan Ma <Duncan.Ma@amd.com>
Signed-off-by: default avatarIvan Lipski <ivan.lipski@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 048bd938

drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c

+7 −0
Original line number Diff line number Diff line
@@ -520,3 +520,10 @@ enum dc_status dc_link_validate_dp_tunneling_bandwidth(const struct dc *dc, cons 
	return dc->link_srv->validate_dp_tunnel_bandwidth(dc, new_ctx);

}



void dc_link_get_alpm_support(struct dc_link *link,

	bool *auxless_support,

	bool *auxwake_support)

{

	link->dc->link_srv->edp_get_alpm_support(link, auxless_support, auxwake_support);

}

drivers/gpu/drm/amd/display/dc/dc.h

+11 −0
Original line number Diff line number Diff line
@@ -1145,6 +1145,11 @@ struct dc_debug_options { 
	bool enable_hblank_borrow;

	bool force_subvp_df_throttle;

	uint32_t acpi_transition_bitmasks[MAX_PIPES];

	unsigned int auxless_alpm_lfps_setup_ns;

	unsigned int auxless_alpm_lfps_period_ns;

	unsigned int auxless_alpm_lfps_silence_ns;

	unsigned int auxless_alpm_lfps_t1t2_us;

	short auxless_alpm_lfps_t1t2_offset_us;

};
@@ -2447,6 +2452,12 @@ void dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link( 
 */

enum dc_status dc_link_validate_dp_tunneling_bandwidth(const struct dc *dc, const struct dc_state *new_ctx);



/*

 * Get if ALPM is supported by the link

 */

void dc_link_get_alpm_support(struct dc_link *link, bool *auxless_support,

	bool *auxwake_support);



/* Sink Interfaces - A sink corresponds to a display output device */



struct dc_container_id {

drivers/gpu/drm/amd/display/dc/dc_dp_types.h

+10 −6
Original line number Diff line number Diff line
@@ -1021,7 +1021,8 @@ union dp_128b_132b_supported_lttpr_link_rates { 
union dp_alpm_lttpr_cap {

	struct {

		uint8_t AUX_LESS_ALPM_SUPPORTED	:1;

		uint8_t RESERVED				:7;

		uint8_t ASSR_SUPPORTED			:1;

		uint8_t RESERVED			:6;

	} bits;

	uint8_t raw;

};
@@ -1122,7 +1123,8 @@ union edp_alpm_caps { 
		uint8_t AUX_WAKE_ALPM_CAP                               :1;

		uint8_t PM_STATE_2A_SUPPORT                             :1;

		uint8_t AUX_LESS_ALPM_CAP                               :1;

		uint8_t RESERVED                :5;

		uint8_t AUX_LESS_ALPM_ML_PHY_SLEEP_STATUS_SUPPORTED     :1;

		uint8_t RESERVED                                        :4;

	} bits;

	uint8_t raw;

};
@@ -1347,7 +1349,9 @@ union dpcd_alpm_configuration { 
	struct {

		unsigned char ENABLE                    : 1;

		unsigned char IRQ_HPD_ENABLE            : 1;

		unsigned char RESERVED                  : 6;

		unsigned char ALPM_MODE_SEL             : 1;

		unsigned char ACDS_PERIOD_DURATION      : 1;

		unsigned char RESERVED                  : 4;

	} bits;

	unsigned char raw;

};

drivers/gpu/drm/amd/display/dc/dc_types.h

+8 −0
Original line number Diff line number Diff line
@@ -577,6 +577,12 @@ struct dc_plane_flip_time { 
	unsigned int prev_update_time_in_us;

};



enum dc_alpm_mode {

	DC_ALPM_AUXWAKE = 0,

	DC_ALPM_AUXLESS = 1,

	DC_ALPM_UNSUPPORTED = 0xF,

};



enum dc_psr_state {

	PSR_STATE0 = 0x0,

	PSR_STATE1,
@@ -1143,6 +1149,8 @@ struct replay_config { 
	bool low_rr_supported;

	/* Replay Video Conferencing Optimization Enabled */

	bool replay_video_conferencing_optimization_enabled;

	/* Replay alpm mode */

	enum dc_alpm_mode alpm_mode;

};



/* Replay feature flags*/

drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c

+13 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
// Copyright 2024 Advanced Micro Devices, Inc.



#include "dc.h"

#include "link.h"

#include "dc_dmub_srv.h"

#include "dmub/dmub_srv.h"

#include "core_types.h"
@@ -189,6 +190,18 @@ static bool dmub_replay_copy_settings(struct dmub_replay *dmub, 
	else

		copy_settings_data->flags.bitfields.force_wakeup_by_tps3 = 0;



	copy_settings_data->flags.bitfields.alpm_mode = (enum dmub_alpm_mode)link->replay_settings.config.alpm_mode;

	if (link->replay_settings.config.alpm_mode == DC_ALPM_AUXLESS) {

		copy_settings_data->auxless_alpm_data.lfps_setup_ns = dc->dc->debug.auxless_alpm_lfps_setup_ns;

		copy_settings_data->auxless_alpm_data.lfps_period_ns = dc->dc->debug.auxless_alpm_lfps_period_ns;

		copy_settings_data->auxless_alpm_data.lfps_silence_ns = dc->dc->debug.auxless_alpm_lfps_silence_ns;

		copy_settings_data->auxless_alpm_data.lfps_t1_t2_override_us =

			dc->dc->debug.auxless_alpm_lfps_t1t2_us;

		copy_settings_data->auxless_alpm_data.lfps_t1_t2_offset_us =

			dc->dc->debug.auxless_alpm_lfps_t1t2_offset_us;

		copy_settings_data->auxless_alpm_data.lttpr_count = link->dc->link_srv->dp_get_lttpr_count(link);

	}



	dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);



	return true;