Commit faab5ea0 authored by Sathishkumar S's avatar Sathishkumar S Committed by Alex Deucher
Browse files

drm/amdgpu: Check vcn sram load return value 



Log an error when vcn sram load fails in indirect mode
and return the same error value.

Signed-off-by: default avatarSathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9d1ac25c

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

+8 −2
Original line number Diff line number Diff line
@@ -865,6 +865,7 @@ static int vcn_v2_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect) 
	volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr;

	struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec;

	uint32_t rb_bufsz, tmp;

	int ret;



	vcn_v2_0_enable_static_power_gating(vinst);
@@ -948,8 +949,13 @@ static int vcn_v2_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect) 
		UVD, 0, mmUVD_MASTINT_EN),

		UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);



	if (indirect)

		amdgpu_vcn_psp_update_sram(adev, 0, 0);

	if (indirect) {

		ret = amdgpu_vcn_psp_update_sram(adev, 0, 0);

		if (ret) {

			dev_err(adev->dev, "vcn sram load failed %d\n", ret);

			return ret;

		}

	}



	/* force RBC into idle state */

	rb_bufsz = order_base_2(ring->ring_size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

+8 −2
Original line number Diff line number Diff line
@@ -1035,6 +1035,7 @@ static int vcn_v2_5_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect) 
	volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;

	struct amdgpu_ring *ring;

	uint32_t rb_bufsz, tmp;

	int ret;



	/* disable register anti-hang mechanism */

	WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS), 1,
@@ -1125,8 +1126,13 @@ static int vcn_v2_5_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect) 
		VCN, 0, mmUVD_MASTINT_EN),

		UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);



	if (indirect)

		amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);

	if (indirect) {

		ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);

		if (ret) {

			dev_err(adev->dev, "vcn sram load failed %d\n", ret);

			return ret;

		}

	}



	ring = &adev->vcn.inst[inst_idx].ring_dec;

	/* force RBC into idle state */

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

+8 −2
Original line number Diff line number Diff line
@@ -1042,6 +1042,7 @@ static int vcn_v3_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect) 
	volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;

	struct amdgpu_ring *ring;

	uint32_t rb_bufsz, tmp;

	int ret;



	/* disable register anti-hang mechanism */

	WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS), 1,
@@ -1134,8 +1135,13 @@ static int vcn_v3_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect) 
	WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET(

		VCN, inst_idx, mmUVD_VCPU_CNTL), tmp, 0, indirect);



	if (indirect)

		amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);

	if (indirect) {

		ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);

		if (ret) {

			dev_err(adev->dev, "vcn sram load failed %d\n", ret);

			return ret;

		}

	}



	ring = &adev->vcn.inst[inst_idx].ring_dec;

	/* force RBC into idle state */

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

+8 −2
Original line number Diff line number Diff line
@@ -1012,6 +1012,7 @@ static int vcn_v4_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect) 
	volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;

	struct amdgpu_ring *ring;

	uint32_t tmp;

	int ret;



	/* disable register anti-hang mechanism */

	WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, regUVD_POWER_STATUS), 1,
@@ -1094,8 +1095,13 @@ static int vcn_v4_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect) 
		UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);





	if (indirect)

		amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);

	if (indirect) {

		ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);

		if (ret) {

			dev_err(adev->dev, "vcn sram load failed %d\n", ret);

			return ret;

		}

	}



	ring = &adev->vcn.inst[inst_idx].ring_enc[0];

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

+8 −3
Original line number Diff line number Diff line
@@ -851,7 +851,7 @@ static int vcn_v4_0_3_start_dpg_mode(struct amdgpu_vcn_inst *vinst, 
	volatile struct amdgpu_vcn4_fw_shared *fw_shared =

						adev->vcn.inst[inst_idx].fw_shared.cpu_addr;

	struct amdgpu_ring *ring;

	int vcn_inst;

	int vcn_inst, ret;

	uint32_t tmp;



	vcn_inst = GET_INST(VCN, inst_idx);
@@ -944,8 +944,13 @@ static int vcn_v4_0_3_start_dpg_mode(struct amdgpu_vcn_inst *vinst, 
		VCN, 0, regUVD_MASTINT_EN),

		UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);



	if (indirect)

		amdgpu_vcn_psp_update_sram(adev, inst_idx, AMDGPU_UCODE_ID_VCN0_RAM);

	if (indirect) {

		ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, AMDGPU_UCODE_ID_VCN0_RAM);

		if (ret) {

			dev_err(adev->dev, "vcn sram load failed %d\n", ret);

			return ret;

		}

	}



	ring = &adev->vcn.inst[inst_idx].ring_enc[0];