Commit fb0ad5ed authored by Lorenzo Pieralisi's avatar Lorenzo Pieralisi Committed by Marc Zyngier
Browse files

arm64/sysreg: Add ICC_ICSR_EL1 



Add ICC_ICSR_EL1 register sysreg description.

Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: default avatarMarc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20250703-gicv5-host-v7-4-12e71f1b3528@kernel.org


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 1bd7238d

arch/arm64/tools/sysreg

+14 −0
Original line number Diff line number Diff line
@@ -3024,6 +3024,20 @@ Sysreg PMIAR_EL1 3 0 9 14 7 
Field	63:0	ADDRESS

EndSysreg



Sysreg	ICC_ICSR_EL1	3	0	12	10	4

Res0	63:48

Field	47:32	IAFFID

Res0	31:16

Field	15:11	Priority

Res0	10:6

Field	5	HM

Field	4	Active

Field	3	IRM

Field	2	Pending

Field	1	Enabled

Field	0	F

EndSysreg



SysregFields	ICC_PPI_PRIORITYRx_EL1

Res0	63:61

Field	60:56	Priority7