Commit fb188d8b authored by Matthew Auld's avatar Matthew Auld
Browse files

drm/xe/migrate: fix chunk handling for 2M page emit 



On systems with PAGE_SIZE > 4K the chunk will likely be rounded down to
zero, if say we have single 2M page, so one huge pte, since we also try
to align the chunk to PAGE_SIZE / XE_PAGE_SIZE, which will be 16 on 64K
systems. Make the ALIGN_DOWN conditional for 4K PTEs where we can
encounter gpu_page_size < PAGE_SIZE.

Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20251022163836.191405-4-matthew.auld@intel.com
parent aaeef7a9

drivers/gpu/drm/xe/xe_migrate.c

+3 −1
Original line number Diff line number Diff line
@@ -1804,7 +1804,9 @@ static void build_pt_update_batch_sram(struct xe_migrate *m, 
	while (ptes) {

		u32 chunk = min(MAX_PTE_PER_SDI, ptes);



		if (!level)

			chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);



		bb->cs[bb->len++] = MI_STORE_DATA_IMM | MI_SDI_NUM_QW(chunk);

		bb->cs[bb->len++] = pt_offset;

		bb->cs[bb->len++] = 0;