Commit fb29541e authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

KVM, x86: add architectural support code for #VE 



Dump the contents of the #VE info data structure and assert that #VE does
not happen, but do not yet do anything with it.

No functional change intended, separated for clarity only.

Extracted from a patch by Isaku Yamahata <isaku.yamahata@intel.com>.

Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 949019b9

arch/x86/include/asm/vmx.h

+12 −0
Original line number Diff line number Diff line
@@ -71,6 +71,7 @@ 
#define SECONDARY_EXEC_ENCLS_EXITING		VMCS_CONTROL_BIT(ENCLS_EXITING)

#define SECONDARY_EXEC_RDSEED_EXITING		VMCS_CONTROL_BIT(RDSEED_EXITING)

#define SECONDARY_EXEC_ENABLE_PML               VMCS_CONTROL_BIT(PAGE_MOD_LOGGING)

#define SECONDARY_EXEC_EPT_VIOLATION_VE		VMCS_CONTROL_BIT(EPT_VIOLATION_VE)

#define SECONDARY_EXEC_PT_CONCEAL_VMX		VMCS_CONTROL_BIT(PT_CONCEAL_VMX)

#define SECONDARY_EXEC_ENABLE_XSAVES		VMCS_CONTROL_BIT(XSAVES)

#define SECONDARY_EXEC_MODE_BASED_EPT_EXEC	VMCS_CONTROL_BIT(MODE_BASED_EPT_EXEC)
@@ -226,6 +227,8 @@ enum vmcs_field { 
	VMREAD_BITMAP_HIGH              = 0x00002027,

	VMWRITE_BITMAP                  = 0x00002028,

	VMWRITE_BITMAP_HIGH             = 0x00002029,

	VE_INFORMATION_ADDRESS		= 0x0000202A,

	VE_INFORMATION_ADDRESS_HIGH	= 0x0000202B,

	XSS_EXIT_BITMAP                 = 0x0000202C,

	XSS_EXIT_BITMAP_HIGH            = 0x0000202D,

	ENCLS_EXITING_BITMAP		= 0x0000202E,
@@ -631,4 +634,13 @@ enum vmx_l1d_flush_state { 


extern enum vmx_l1d_flush_state l1tf_vmx_mitigation;



struct vmx_ve_information {

	u32 exit_reason;

	u32 delivery;

	u64 exit_qualification;

	u64 guest_linear_address;

	u64 guest_physical_address;

	u16 eptp_index;

};



#endif

arch/x86/kvm/vmx/vmx.c

+4 −0
Original line number Diff line number Diff line
@@ -6408,6 +6408,10 @@ void dump_vmcs(struct kvm_vcpu *vcpu) 
	if (secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID)

		pr_err("Virtual processor ID = 0x%04x\n",

		       vmcs_read16(VIRTUAL_PROCESSOR_ID));

	if (secondary_exec_control & SECONDARY_EXEC_EPT_VIOLATION_VE) {

		pr_err("VE info address = 0x%016llx\n",

		       vmcs_read64(VE_INFORMATION_ADDRESS));

	}

}



/*