Commit fb2bb2a1 authored by Fan Gong's avatar Fan Gong Committed by Jakub Kicinski
Browse files

hinic3: Fix netif_queue_set_napi queue_index input parameter error 



Incorrectly transmitted interrupt number instead of queue number
when using netif_queue_set_napi. Besides, move this to appropriate
code location to set napi.

Remove redundant netif_stop_subqueue beacuase it is not part of the
hinic3_send_one_skb process.

Fixes: 17fcb3dc ("hinic3: module initialization and tx/rx logic")
Co-developed-by: default avatarZhu Yikai <zhuyikai1@h-partners.com>
Signed-off-by: default avatarZhu Yikai <zhuyikai1@h-partners.com>
Signed-off-by: default avatarFan Gong <gongfan1@huawei.com>
Link: https://patch.msgid.link/7b8e4eb5c53cbd873ee9aaefeb3d9dbbaff52deb.1769070766.git.zhuyikai1@h-partners.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 9146fe28

drivers/net/ethernet/huawei/hinic3/hinic3_irq.c

+13 −9
Original line number Diff line number Diff line
@@ -43,21 +43,12 @@ static void qp_add_napi(struct hinic3_irq_cfg *irq_cfg) 
	struct hinic3_nic_dev *nic_dev = netdev_priv(irq_cfg->netdev);



	netif_napi_add(nic_dev->netdev, &irq_cfg->napi, hinic3_poll);

	netif_queue_set_napi(irq_cfg->netdev, irq_cfg->irq_id,

			     NETDEV_QUEUE_TYPE_RX, &irq_cfg->napi);

	netif_queue_set_napi(irq_cfg->netdev, irq_cfg->irq_id,

			     NETDEV_QUEUE_TYPE_TX, &irq_cfg->napi);

	napi_enable(&irq_cfg->napi);

}



static void qp_del_napi(struct hinic3_irq_cfg *irq_cfg)

{

	napi_disable(&irq_cfg->napi);

	netif_queue_set_napi(irq_cfg->netdev, irq_cfg->irq_id,

			     NETDEV_QUEUE_TYPE_RX, NULL);

	netif_queue_set_napi(irq_cfg->netdev, irq_cfg->irq_id,

			     NETDEV_QUEUE_TYPE_TX, NULL);

	netif_stop_subqueue(irq_cfg->netdev, irq_cfg->irq_id);

	netif_napi_del(&irq_cfg->napi);

}
@@ -150,6 +141,11 @@ int hinic3_qps_irq_init(struct net_device *netdev) 
			goto err_release_irqs;

		}



		netif_queue_set_napi(irq_cfg->netdev, q_id,

				     NETDEV_QUEUE_TYPE_RX, &irq_cfg->napi);

		netif_queue_set_napi(irq_cfg->netdev, q_id,

				     NETDEV_QUEUE_TYPE_TX, &irq_cfg->napi);



		hinic3_set_msix_auto_mask_state(nic_dev->hwdev,

						irq_cfg->msix_entry_idx,

						HINIC3_SET_MSIX_AUTO_MASK);
@@ -164,6 +160,10 @@ int hinic3_qps_irq_init(struct net_device *netdev) 
		q_id--;

		irq_cfg = &nic_dev->q_params.irq_cfg[q_id];

		qp_del_napi(irq_cfg);

		netif_queue_set_napi(irq_cfg->netdev, q_id,

				     NETDEV_QUEUE_TYPE_RX, NULL);

		netif_queue_set_napi(irq_cfg->netdev, q_id,

				     NETDEV_QUEUE_TYPE_TX, NULL);

		hinic3_set_msix_state(nic_dev->hwdev, irq_cfg->msix_entry_idx,

				      HINIC3_MSIX_DISABLE);

		hinic3_set_msix_auto_mask_state(nic_dev->hwdev,
@@ -184,6 +184,10 @@ void hinic3_qps_irq_uninit(struct net_device *netdev) 
	for (q_id = 0; q_id < nic_dev->q_params.num_qps; q_id++) {

		irq_cfg = &nic_dev->q_params.irq_cfg[q_id];

		qp_del_napi(irq_cfg);

		netif_queue_set_napi(irq_cfg->netdev, q_id,

				     NETDEV_QUEUE_TYPE_RX, NULL);

		netif_queue_set_napi(irq_cfg->netdev, q_id,

				     NETDEV_QUEUE_TYPE_TX, NULL);

		hinic3_set_msix_state(nic_dev->hwdev, irq_cfg->msix_entry_idx,

				      HINIC3_MSIX_DISABLE);

		hinic3_set_msix_auto_mask_state(nic_dev->hwdev,