Commit fb5a52db authored by Srinivasan Shanmugam's avatar Srinivasan Shanmugam Committed by Alex Deucher
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drm/amdgpu: Implement TTM handling for MMIO_REMAP placement 



Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves as a
CPU-visible IO page:

* amdgpu_evict_flags(): mark as unmovable
* amdgpu_res_cpu_visible(): consider CPU-visible
* amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
* amdgpu_ttm_io_mem_reserve(): program base/is_iomem/caching using
  the device's mmio_remap_* metadata
* amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
* amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type

v2:
- Drop HDP-specific comment; keep generic remap (Alex).

v3:
- Fix indentation in amdgpu_res_cpu_visible (Christian).
- Use adev->rmmio_remap.bus_addr for MMIO_REMAP bus/PFN calculations
  (Alex).

v4:
- Drop unnecessary (resource_size_t) casts in MMIO_REMAP io-mem paths
  (Alex)

Cc: Christian König <christian.koenig@amd.com>
Suggested-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarSrinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 99eeb835

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

+16 −3
Original line number Diff line number Diff line
@@ -123,6 +123,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo, 
	case AMDGPU_PL_GWS:

	case AMDGPU_PL_OA:

	case AMDGPU_PL_DOORBELL:

	case AMDGPU_PL_MMIO_REMAP:

		placement->num_placement = 0;

		return;
@@ -447,7 +448,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev, 
		return false;



	if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||

	    res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)

	    res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL ||

	    res->mem_type == AMDGPU_PL_MMIO_REMAP)

		return true;



	if (res->mem_type != TTM_PL_VRAM)
@@ -538,10 +540,12 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict, 
	    old_mem->mem_type == AMDGPU_PL_GWS ||

	    old_mem->mem_type == AMDGPU_PL_OA ||

	    old_mem->mem_type == AMDGPU_PL_DOORBELL ||

	    old_mem->mem_type == AMDGPU_PL_MMIO_REMAP ||

	    new_mem->mem_type == AMDGPU_PL_GDS ||

	    new_mem->mem_type == AMDGPU_PL_GWS ||

	    new_mem->mem_type == AMDGPU_PL_OA ||

	    new_mem->mem_type == AMDGPU_PL_DOORBELL) {

	    new_mem->mem_type == AMDGPU_PL_DOORBELL ||

	    new_mem->mem_type == AMDGPU_PL_MMIO_REMAP) {

		/* Nothing to save here */

		amdgpu_bo_move_notify(bo, evict, new_mem);

		ttm_bo_move_null(bo, new_mem);
@@ -629,6 +633,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev, 
		mem->bus.is_iomem = true;

		mem->bus.caching = ttm_uncached;

		break;

	case AMDGPU_PL_MMIO_REMAP:

		mem->bus.offset = mem->start << PAGE_SHIFT;

		mem->bus.offset += adev->rmmio_remap.bus_addr;

		mem->bus.is_iomem = true;

		mem->bus.caching = ttm_uncached;

		break;

	default:

		return -EINVAL;

	}
@@ -646,6 +656,8 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo, 


	if (bo->resource->mem_type == AMDGPU_PL_DOORBELL)

		return ((uint64_t)(adev->doorbell.base + cursor.start)) >> PAGE_SHIFT;

	else if (bo->resource->mem_type == AMDGPU_PL_MMIO_REMAP)

		return ((uint64_t)(adev->rmmio_remap.bus_addr + cursor.start)) >> PAGE_SHIFT;



	return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;

}
@@ -1355,7 +1367,8 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem) 


	if (mem && (mem->mem_type == TTM_PL_TT ||

		    mem->mem_type == AMDGPU_PL_DOORBELL ||

		    mem->mem_type == AMDGPU_PL_PREEMPT)) {

		    mem->mem_type == AMDGPU_PL_PREEMPT ||

		    mem->mem_type == AMDGPU_PL_MMIO_REMAP)) {

		flags |= AMDGPU_PTE_SYSTEM;



		if (ttm->caching == ttm_cached)