Commit fb7cb344 authored by Paul Kocialkowski's avatar Paul Kocialkowski Committed by Mauro Carvalho Chehab
Browse files

media: hantro: Add support for the Rockchip PX30 



The PX30 SoC includes both the VDPU2 and VEPU2 blocks which are similar
to the RK3399 (Hantro G1/H1 with shuffled registers).

Signed-off-by: default avatarPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: default avatarEzequiel Garcia <ezequiel@collabora.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 1f82f2df

drivers/staging/media/hantro/hantro_drv.c

+1 −0
Original line number Diff line number Diff line
@@ -582,6 +582,7 @@ static const struct v4l2_file_operations hantro_fops = { 


static const struct of_device_id of_hantro_match[] = {

#ifdef CONFIG_VIDEO_HANTRO_ROCKCHIP

	{ .compatible = "rockchip,px30-vpu",   .data = &px30_vpu_variant, },

	{ .compatible = "rockchip,rk3036-vpu", .data = &rk3036_vpu_variant, },

	{ .compatible = "rockchip,rk3066-vpu", .data = &rk3066_vpu_variant, },

	{ .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },

drivers/staging/media/hantro/hantro_hw.h

+1 −0
Original line number Diff line number Diff line
@@ -209,6 +209,7 @@ enum hantro_enc_fmt { 


extern const struct hantro_variant imx8mq_vpu_g2_variant;

extern const struct hantro_variant imx8mq_vpu_variant;

extern const struct hantro_variant px30_vpu_variant;

extern const struct hantro_variant rk3036_vpu_variant;

extern const struct hantro_variant rk3066_vpu_variant;

extern const struct hantro_variant rk3288_vpu_variant;

drivers/staging/media/hantro/rockchip_vpu_hw.c

+17 −0
Original line number Diff line number Diff line
@@ -548,3 +548,20 @@ const struct hantro_variant rk3399_vpu_variant = { 
	.clk_names = rockchip_vpu_clk_names,

	.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)

};



const struct hantro_variant px30_vpu_variant = {

	.enc_offset = 0x0,

	.enc_fmts = rockchip_vpu_enc_fmts,

	.num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts),

	.dec_offset = 0x400,

	.dec_fmts = rk3399_vpu_dec_fmts,

	.num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),

	.codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER |

		 HANTRO_VP8_DECODER | HANTRO_H264_DECODER,

	.codec_ops = rk3399_vpu_codec_ops,

	.irqs = rockchip_vpu2_irqs,

	.num_irqs = ARRAY_SIZE(rockchip_vpu2_irqs),

	.init = rk3036_vpu_hw_init,

	.clk_names = rockchip_vpu_clk_names,

	.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)

};