Commit fbea35a6 authored by Chukun Pan's avatar Chukun Pan Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Move rk3568 PCIe3 MSI to use GIC ITS 



Following commit b956c9de ("arm64: dts: rockchip: rk356x: Move
PCIe MSI to use GIC ITS instead of MBI"), change the PCIe3 controller's
MSI on rk3568 to use ITS, so that all MSI-X can work properly.

Signed-off-by: default avatarChukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250308093008.568437-2-amadeus@jmu.edu.cn


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 8eca9e97

arch/arm64/boot/dts/rockchip/rk3568.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -152,7 +152,7 @@ pcie3x1: pcie@fe270000 { 
		compatible = "rockchip,rk3568-pcie";

		#address-cells = <3>;

		#size-cells = <2>;

		bus-range = <0x0 0xf>;

		bus-range = <0x10 0x1f>;

		clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>,

			 <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>,

			 <&cru CLK_PCIE30X1_AUX_NDFT>;
@@ -175,7 +175,7 @@ pcie3x1: pcie@fe270000 { 
		num-ib-windows = <6>;

		num-ob-windows = <2>;

		max-link-speed = <3>;

		msi-map = <0x0 &gic 0x1000 0x1000>;

		msi-map = <0x1000 &its 0x1000 0x1000>;

		num-lanes = <1>;

		phys = <&pcie30phy>;

		phy-names = "pcie-phy";
@@ -205,7 +205,7 @@ pcie3x2: pcie@fe280000 { 
		compatible = "rockchip,rk3568-pcie";

		#address-cells = <3>;

		#size-cells = <2>;

		bus-range = <0x0 0xf>;

		bus-range = <0x20 0x2f>;

		clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,

			 <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>,

			 <&cru CLK_PCIE30X2_AUX_NDFT>;
@@ -228,7 +228,7 @@ pcie3x2: pcie@fe280000 { 
		num-ib-windows = <6>;

		num-ob-windows = <2>;

		max-link-speed = <3>;

		msi-map = <0x0 &gic 0x2000 0x1000>;

		msi-map = <0x2000 &its 0x2000 0x1000>;

		num-lanes = <2>;

		phys = <&pcie30phy>;

		phy-names = "pcie-phy";