Commit fc866f24 authored by Sohil Mehta's avatar Sohil Mehta Committed by Ingo Molnar
Browse files

x86/cpu/intel: Replace Family 15 checks with VFM ones



Introduce names for some old pentium 4 models and replace the x86_model
checks with VFM ones.

Signed-off-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Acked-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/r/20250219184133.816753-7-sohil.mehta@intel.com
parent eaa472f7
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -184,6 +184,10 @@
/* Family 5 */
#define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */

/* Family 15 - NetBurst */
#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
#define INTEL_P4_PRESCOTT		IFM(15, 0x03)

/* Family 19 */
#define INTEL_PANTHERCOVE_X		IFM(19, 0x01) /* Diamond Rapids */

+3 −3
Original line number Diff line number Diff line
@@ -247,8 +247,8 @@ static void early_init_intel(struct cpuinfo_x86 *c)
#endif

	/* CPUID workaround for 0F33/0F34 CPU */
	if (c->x86 == 0xF && c->x86_model == 0x3
	    && (c->x86_stepping == 0x3 || c->x86_stepping == 0x4))
	if (c->x86_vfm == INTEL_P4_PRESCOTT &&
	    (c->x86_stepping == 0x3 || c->x86_stepping == 0x4))
		c->x86_phys_bits = 36;

	/*
@@ -421,7 +421,7 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
	 * P4 Xeon erratum 037 workaround.
	 * Hardware prefetcher may cause stale data to be loaded into the cache.
	 */
	if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_stepping == 1)) {
	if (c->x86_vfm == INTEL_P4_WILLAMETTE && c->x86_stepping == 1) {
		if (msr_set_bit(MSR_IA32_MISC_ENABLE,
				MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT) > 0) {
			pr_info("CPU: C0 stepping P4 Xeon detected.\n");