Unverified Commit fcf27a6a authored by Mario Limonciello's avatar Mario Limonciello Committed by Ilpo Järvinen
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platform/x86: amd: pmf: Fix STT limits 



On some platforms it has been observed that STT limits are not being
applied properly causing poor performance as power limits are set too low.

STT limits that are sent to the platform are supposed to be in Q8.8
format.  Convert them before sending.

Reported-by: default avatarYijun Shen <Yijun.Shen@dell.com>
Fixes: 7c45534a ("platform/x86/amd/pmf: Add support for PMF Policy Binary")
Cc: stable@vger.kernel.org
Tested-by: default avatarYijun Shen <Yijun_Shen@Dell.com>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Acked-by: default avatarShyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20250407181915.1482450-1-superm1@kernel.org


Signed-off-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
parent b129005d

drivers/platform/x86/amd/pmf/auto-mode.c

+2 −2
Original line number Diff line number Diff line
@@ -120,9 +120,9 @@ static void amd_pmf_set_automode(struct amd_pmf_dev *dev, int idx, 
	amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pwr_ctrl->sppt_apu_only, NULL);

	amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pwr_ctrl->stt_min, NULL);

	amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,

			 pwr_ctrl->stt_skin_temp[STT_TEMP_APU], NULL);

			 fixp_q88_fromint(pwr_ctrl->stt_skin_temp[STT_TEMP_APU]), NULL);

	amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,

			 pwr_ctrl->stt_skin_temp[STT_TEMP_HS2], NULL);

			 fixp_q88_fromint(pwr_ctrl->stt_skin_temp[STT_TEMP_HS2]), NULL);



	if (is_apmf_func_supported(dev, APMF_FUNC_SET_FAN_IDX))

		apmf_update_fan_idx(dev, config_store.mode_set[idx].fan_control.manual,

drivers/platform/x86/amd/pmf/cnqf.c

+4 −4
Original line number Diff line number Diff line
@@ -81,10 +81,10 @@ static int amd_pmf_set_cnqf(struct amd_pmf_dev *dev, int src, int idx, 
	amd_pmf_send_cmd(dev, SET_SPPT, false, pc->sppt, NULL);

	amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pc->sppt_apu_only, NULL);

	amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pc->stt_min, NULL);

	amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false, pc->stt_skin_temp[STT_TEMP_APU],

			 NULL);

	amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false, pc->stt_skin_temp[STT_TEMP_HS2],

			 NULL);

	amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,

			 fixp_q88_fromint(pc->stt_skin_temp[STT_TEMP_APU]), NULL);

	amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,

			 fixp_q88_fromint(pc->stt_skin_temp[STT_TEMP_HS2]), NULL);



	if (is_apmf_func_supported(dev, APMF_FUNC_SET_FAN_IDX))

		apmf_update_fan_idx(dev,

drivers/platform/x86/amd/pmf/core.c

+14 −0
Original line number Diff line number Diff line
@@ -176,6 +176,20 @@ static void __maybe_unused amd_pmf_dump_registers(struct amd_pmf_dev *dev) 
	dev_dbg(dev->dev, "AMD_PMF_REGISTER_MESSAGE:%x\n", value);

}



/**

 * fixp_q88_fromint: Convert integer to Q8.8

 * @val: input value

 *

 * Converts an integer into binary fixed point format where 8 bits

 * are used for integer and 8 bits are used for the decimal.

 *

 * Return: unsigned integer converted to Q8.8 format

 */

u32 fixp_q88_fromint(u32 val)

{

	return val << 8;

}



int amd_pmf_send_cmd(struct amd_pmf_dev *dev, u8 message, bool get, u32 arg, u32 *data)

{

	int rc;

drivers/platform/x86/amd/pmf/pmf.h

+1 −0
Original line number Diff line number Diff line
@@ -777,6 +777,7 @@ int apmf_install_handler(struct amd_pmf_dev *pmf_dev); 
int apmf_os_power_slider_update(struct amd_pmf_dev *dev, u8 flag);

int amd_pmf_set_dram_addr(struct amd_pmf_dev *dev, bool alloc_buffer);

int amd_pmf_notify_sbios_heartbeat_event_v2(struct amd_pmf_dev *dev, u8 flag);

u32 fixp_q88_fromint(u32 val);



/* SPS Layer */

int amd_pmf_get_pprof_modes(struct amd_pmf_dev *pmf);

drivers/platform/x86/amd/pmf/sps.c

+8 −4
Original line number Diff line number Diff line
@@ -198,9 +198,11 @@ static void amd_pmf_update_slider_v2(struct amd_pmf_dev *dev, int idx) 
	amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false,

			 apts_config_store.val[idx].stt_min_limit, NULL);

	amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,

			 apts_config_store.val[idx].stt_skin_temp_limit_apu, NULL);

			 fixp_q88_fromint(apts_config_store.val[idx].stt_skin_temp_limit_apu),

			 NULL);

	amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,

			 apts_config_store.val[idx].stt_skin_temp_limit_hs2, NULL);

			 fixp_q88_fromint(apts_config_store.val[idx].stt_skin_temp_limit_hs2),

			 NULL);

}



void amd_pmf_update_slider(struct amd_pmf_dev *dev, bool op, int idx,
@@ -217,9 +219,11 @@ void amd_pmf_update_slider(struct amd_pmf_dev *dev, bool op, int idx, 
		amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false,

				 config_store.prop[src][idx].stt_min, NULL);

		amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,

				 config_store.prop[src][idx].stt_skin_temp[STT_TEMP_APU], NULL);

				 fixp_q88_fromint(config_store.prop[src][idx].stt_skin_temp[STT_TEMP_APU]),

				 NULL);

		amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,

				 config_store.prop[src][idx].stt_skin_temp[STT_TEMP_HS2], NULL);

				 fixp_q88_fromint(config_store.prop[src][idx].stt_skin_temp[STT_TEMP_HS2]),

				 NULL);

	} else if (op == SLIDER_OP_GET) {

		amd_pmf_send_cmd(dev, GET_SPL, true, ARG_NONE, &table->prop[src][idx].spl);

		amd_pmf_send_cmd(dev, GET_FPPT, true, ARG_NONE, &table->prop[src][idx].fppt);