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drm/amd/display: Fix scratch registers offsets for DCN351
[Why] Different platforms use different NBIO header files, causing display code to use differnt offset and read wrong accelerated status. [How] - Unified NBIO offset header file across platform. - Correct scratch registers offsets to proper locations. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4667 Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
Ray Wu <ray.wu@amd.com> Signed-off-by:
Chenyu Chen <chen-yu.chen@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 576e032e) Cc: stable@vger.kernel.org