Commit fda5108e authored by Suravee Suthikulpanit's avatar Suravee Suthikulpanit Committed by Joerg Roedel
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iommu/amd: Introduce struct protection_domain.pd_mode



This enum variable is used to track the type of page table used by the
protection domain. It will replace the protection_domain.flags in
subsequent series.

Suggested-by: default avatarJason Gunthorpe <jgg@ziepe.ca>
Signed-off-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240205115615.6053-5-vasant.hegde@amd.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 6f35fe5d
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+6 −0
Original line number Diff line number Diff line
@@ -541,6 +541,11 @@ struct amd_io_pgtable {
	u64			*pgd;		/* v2 pgtable pgd pointer */
};

enum protection_domain_mode {
	PD_MODE_V1 = 1,
	PD_MODE_V2,
};

/*
 * This structure contains generic data for  IOMMU protection domains
 * independent of their use.
@@ -556,6 +561,7 @@ struct protection_domain {
	int nid;		/* Node ID */
	u64 *gcr3_tbl;		/* Guest CR3 table */
	unsigned long flags;	/* flags to find out type of domain */
	enum protection_domain_mode pd_mode; /* Track page table type */
	bool dirty_tracking;	/* dirty tracking is enabled in the domain */
	unsigned dev_cnt;	/* devices assigned to this domain */
	unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */
+2 −0
Original line number Diff line number Diff line
@@ -2068,6 +2068,7 @@ static int protection_domain_init_v1(struct protection_domain *domain, int mode)
			return -ENOMEM;
	}

	domain->pd_mode = PD_MODE_V1;
	amd_iommu_domain_set_pgtable(domain, pt_root, mode);

	return 0;
@@ -2076,6 +2077,7 @@ static int protection_domain_init_v1(struct protection_domain *domain, int mode)
static int protection_domain_init_v2(struct protection_domain *domain)
{
	domain->flags |= PD_GIOV_MASK;
	domain->pd_mode = PD_MODE_V2;

	domain->domain.pgsize_bitmap = AMD_IOMMU_PGSIZES_V2;