Commit fdcb3ff6 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge branch 'ib-sophgo' into devel



Pull the immutable branch into devel for next.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parents 3dd3ab69 614a54cb
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+129 −0
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/sophgo,sg2042-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sophgo SG2042 Pin Controller

maintainers:
  - Inochi Amaoto <inochiama@outlook.com>

properties:
  compatible:
    enum:
      - sophgo,sg2042-pinctrl
      - sophgo,sg2044-pinctrl

  reg:
    maxItems: 1

patternProperties:
  '-cfg$':
    type: object
    description:
      A pinctrl node should contain at least one subnode representing the
      pinctrl groups available on the machine.

    additionalProperties: false

    patternProperties:
      '-pins$':
        type: object
        description: |
          Each subnode will list the pins it needs, and how they should
          be configured, with regard to muxer configuration, bias input
          enable/disable, input schmitt trigger enable, drive strength
          output enable/disable state. For configuration detail,
          refer to https://github.com/sophgo/sophgo-doc/.

        allOf:
          - $ref: pincfg-node.yaml#
          - $ref: pinmux-node.yaml#

        properties:
          pinmux:
            description: |
              The list of GPIOs and their mux settings that properties in the
              node apply to. This should be set using the PINMUX macro.

          bias-disable: true

          bias-pull-up:
            type: boolean

          bias-pull-down:
            type: boolean

          drive-strength-microamp:
            description: typical current when output low level.

          input-schmitt-enable: true

          input-schmitt-disable: true

        required:
          - pinmux

        additionalProperties: false

required:
  - compatible
  - reg

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: sophgo,sg2042-pinctrl
    then:
      patternProperties:
        '-cfg$':
          patternProperties:
            '-pins$':
              properties:
                drive-strength-microamp:
                  enum: [ 5400, 8100, 10700, 13400,
                          16100, 18800, 21400, 24100,
                          26800, 29400, 32100, 34800,
                          37400, 40100, 42800, 45400 ]

  - if:
      properties:
        compatible:
          contains:
            const: sophgo,sg2044-pinctrl
    then:
      patternProperties:
        '-cfg$':
          patternProperties:
            '-pins$':
              properties:
                drive-strength-microamp:
                  enum: [ 3200, 6400, 9600, 12700,
                          15900, 19100, 22200, 25300,
                          29500, 32700, 35900, 39000,
                          42000, 45200, 48300, 51400]

additionalProperties: false

examples:
  - |
    #include <dt-bindings/pinctrl/pinctrl-sg2042.h>

    pinctrl@30011000 {
        compatible = "sophgo,sg2042-pinctrl";
        reg = <30011000 0x1000>;

        uart0_cfg: uart0-cfg {
            uart0-pins {
                pinmux = <PINMUX(PIN_UART0_TX, 0)>,
                         <PINMUX(PIN_UART0_RX, 0)>;
                bias-pull-up;
                drive-strength-microamp = <13400>;
            };
        };
    };

...
+40 −6
Original line number Diff line number Diff line
@@ -3,17 +3,21 @@
# Sophgo SoC PINCTRL drivers
#

config PINCTRL_SOPHGO_CV18XX
	bool
config PINCTRL_SOPHGO_COMMON
	tristate
	select GENERIC_PINCTRL_GROUPS
	select GENERIC_PINMUX_FUNCTIONS
	select GENERIC_PINCONF

config PINCTRL_SOPHGO_CV18XX_OPS
	bool

config PINCTRL_SOPHGO_CV1800B
	tristate "Sophgo CV1800B SoC Pinctrl driver"
	depends on ARCH_SOPHGO || COMPILE_TEST
	depends on OF
	select PINCTRL_SOPHGO_CV18XX
	select PINCTRL_SOPHGO_COMMON
	select PINCTRL_SOPHGO_CV18XX_OPS
	help
	  Say Y to select the pinctrl driver for CV1800B SoC.
	  This pin controller allows selecting the mux function for
@@ -24,7 +28,8 @@ config PINCTRL_SOPHGO_CV1812H
	tristate "Sophgo CV1812H SoC Pinctrl driver"
	depends on ARCH_SOPHGO || COMPILE_TEST
	depends on OF
	select PINCTRL_SOPHGO_CV18XX
	select PINCTRL_SOPHGO_COMMON
	select PINCTRL_SOPHGO_CV18XX_OPS
	help
	  Say Y to select the pinctrl driver for CV1812H SoC.
	  This pin controller allows selecting the mux function for
@@ -35,7 +40,8 @@ config PINCTRL_SOPHGO_SG2000
	tristate "Sophgo SG2000 SoC Pinctrl driver"
	depends on ARCH_SOPHGO || COMPILE_TEST
	depends on OF
	select PINCTRL_SOPHGO_CV18XX
	select PINCTRL_SOPHGO_COMMON
	select PINCTRL_SOPHGO_CV18XX_OPS
	help
	  Say Y to select the pinctrl driver for SG2000 SoC.
	  This pin controller allows selecting the mux function for
@@ -46,9 +52,37 @@ config PINCTRL_SOPHGO_SG2002
	tristate "Sophgo SG2002 SoC Pinctrl driver"
	depends on ARCH_SOPHGO || COMPILE_TEST
	depends on OF
	select PINCTRL_SOPHGO_CV18XX
	select PINCTRL_SOPHGO_COMMON
	select PINCTRL_SOPHGO_CV18XX_OPS
	help
	  Say Y to select the pinctrl driver for SG2002 SoC.
	  This pin controller allows selecting the mux function for
	  each pin. This driver can also be built as a module called
	  pinctrl-sg2002.

config PINCTRL_SOPHGO_SG2042_OPS
	bool

config PINCTRL_SOPHGO_SG2042
	tristate "Sophgo SG2042 SoC Pinctrl driver"
	depends on ARCH_SOPHGO || COMPILE_TEST
	depends on OF
	select PINCTRL_SOPHGO_COMMON
	select PINCTRL_SOPHGO_SG2042_OPS
	help
	  Say Y to select the pinctrl driver for SG2042 SoC.
	  This pin controller allows selecting the mux function for
	  each pin. This driver can also be built as a module called
	  pinctrl-sg2042.

config PINCTRL_SOPHGO_SG2044
	tristate "Sophgo SG2044 SoC Pinctrl driver"
	depends on ARCH_SOPHGO || COMPILE_TEST
	depends on OF
	select PINCTRL_SOPHGO_COMMON
	select PINCTRL_SOPHGO_SG2042_OPS
	help
	  Say Y to select the pinctrl driver for SG2044 SoC.
	  This pin controller allows selecting the mux function for
	  each pin. This driver can also be built as a module called
	  pinctrl-sg2044.
+7 −1
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0

obj-$(CONFIG_PINCTRL_SOPHGO_CV18XX)	+= pinctrl-cv18xx.o
obj-$(CONFIG_PINCTRL_SOPHGO_COMMON)	+= pinctrl-sophgo.o
pinctrl-sophgo-objs			+= pinctrl-sophgo-common.o
pinctrl-sophgo-$(CONFIG_PINCTRL_SOPHGO_CV18XX_OPS) += pinctrl-cv18xx.o
pinctrl-sophgo-$(CONFIG_PINCTRL_SOPHGO_SG2042_OPS) += pinctrl-sg2042-ops.o

obj-$(CONFIG_PINCTRL_SOPHGO_CV1800B)	+= pinctrl-cv1800b.o
obj-$(CONFIG_PINCTRL_SOPHGO_CV1812H)	+= pinctrl-cv1812h.o
obj-$(CONFIG_PINCTRL_SOPHGO_SG2000)	+= pinctrl-sg2000.o
obj-$(CONFIG_PINCTRL_SOPHGO_SG2002)	+= pinctrl-sg2002.o
obj-$(CONFIG_PINCTRL_SOPHGO_SG2042)	+= pinctrl-sg2042.o
obj-$(CONFIG_PINCTRL_SOPHGO_SG2044)	+= pinctrl-sg2044.o
+18 −9
Original line number Diff line number Diff line
@@ -34,8 +34,9 @@ static const char *const cv1800b_power_domain_desc[] = {
	[VDDIO_SD0_SPI]			= "VDDIO_SD0_SPI",
};

static int cv1800b_get_pull_up(struct cv1800_pin *pin, const u32 *psmap)
static int cv1800b_get_pull_up(const struct sophgo_pin *sp, const u32 *psmap)
{
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	u32 pstate = psmap[pin->power_domain];
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);

@@ -54,8 +55,9 @@ static int cv1800b_get_pull_up(struct cv1800_pin *pin, const u32 *psmap)
	return -ENOTSUPP;
}

static int cv1800b_get_pull_down(struct cv1800_pin *pin, const u32 *psmap)
static int cv1800b_get_pull_down(const struct sophgo_pin *sp, const u32 *psmap)
{
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	u32 pstate = psmap[pin->power_domain];
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);

@@ -108,9 +110,10 @@ static const u32 cv1800b_eth_oc_map[] = {
	17800
};

static int cv1800b_get_oc_map(struct cv1800_pin *pin, const u32 *psmap,
static int cv1800b_get_oc_map(const struct sophgo_pin *sp, const u32 *psmap,
			      const u32 **map)
{
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
	u32 pstate = psmap[pin->power_domain];

@@ -153,9 +156,10 @@ static const u32 cv1800b_18od33_3v3_schmitt_map[] = {
	1100000
};

static int cv1800b_get_schmitt_map(struct cv1800_pin *pin, const u32 *psmap,
static int cv1800b_get_schmitt_map(const struct sophgo_pin *sp, const u32 *psmap,
				   const u32 **map)
{
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
	u32 pstate = psmap[pin->power_domain];

@@ -177,7 +181,7 @@ static int cv1800b_get_schmitt_map(struct cv1800_pin *pin, const u32 *psmap,
	return -ENOTSUPP;
}

static const struct cv1800_vddio_cfg_ops cv1800b_vddio_cfg_ops = {
static const struct sophgo_vddio_cfg_ops cv1800b_vddio_cfg_ops = {
	.get_pull_up		= cv1800b_get_pull_up,
	.get_pull_down		= cv1800b_get_pull_down,
	.get_oc_map		= cv1800b_get_oc_map,
@@ -433,13 +437,18 @@ static const struct cv1800_pin cv1800b_pin_data[ARRAY_SIZE(cv1800b_pins)] = {
			CV1800_PINCONF_AREA_SYS, 0x120, 5),
};

static const struct cv1800_pinctrl_data cv1800b_pindata = {
static const struct sophgo_pinctrl_data cv1800b_pindata = {
	.pins		= cv1800b_pins,
	.pindata	= cv1800b_pin_data,
	.pdnames	= cv1800b_power_domain_desc,
	.vddio_ops	= &cv1800b_vddio_cfg_ops,
	.cfg_ops	= &cv1800_cfg_ops,
	.pctl_ops	= &cv1800_pctrl_ops,
	.pmx_ops	= &cv1800_pmx_ops,
	.pconf_ops	= &cv1800_pconf_ops,
	.npins		= ARRAY_SIZE(cv1800b_pins),
	.npd		= ARRAY_SIZE(cv1800b_power_domain_desc),
	.npds		= ARRAY_SIZE(cv1800b_power_domain_desc),
	.pinsize	= sizeof(struct cv1800_pin),
};

static const struct of_device_id cv1800b_pinctrl_ids[] = {
@@ -449,7 +458,7 @@ static const struct of_device_id cv1800b_pinctrl_ids[] = {
MODULE_DEVICE_TABLE(of, cv1800b_pinctrl_ids);

static struct platform_driver cv1800b_pinctrl_driver = {
	.probe	= cv1800_pinctrl_probe,
	.probe	= sophgo_pinctrl_probe,
	.driver	= {
		.name			= "cv1800b-pinctrl",
		.suppress_bind_attrs	= true,
+18 −9
Original line number Diff line number Diff line
@@ -40,8 +40,9 @@ static const char *const cv1812h_power_domain_desc[] = {
	[VDDIO_VIVO]		= "VDDIO_VIVO",
};

static int cv1812h_get_pull_up(struct cv1800_pin *pin, const u32 *psmap)
static int cv1812h_get_pull_up(const struct sophgo_pin *sp, const u32 *psmap)
{
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	u32 pstate = psmap[pin->power_domain];
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);

@@ -60,8 +61,9 @@ static int cv1812h_get_pull_up(struct cv1800_pin *pin, const u32 *psmap)
	return -ENOTSUPP;
}

static int cv1812h_get_pull_down(struct cv1800_pin *pin, const u32 *psmap)
static int cv1812h_get_pull_down(const struct sophgo_pin *sp, const u32 *psmap)
{
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	u32 pstate = psmap[pin->power_domain];
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);

@@ -114,9 +116,10 @@ static const u32 cv1812h_eth_oc_map[] = {
	17800
};

static int cv1812h_get_oc_map(struct cv1800_pin *pin, const u32 *psmap,
static int cv1812h_get_oc_map(const struct sophgo_pin *sp, const u32 *psmap,
			      const u32 **map)
{
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
	u32 pstate = psmap[pin->power_domain];

@@ -159,9 +162,10 @@ static const u32 cv1812h_18od33_3v3_schmitt_map[] = {
	1100000
};

static int cv1812h_get_schmitt_map(struct cv1800_pin *pin, const u32 *psmap,
static int cv1812h_get_schmitt_map(const struct sophgo_pin *sp, const u32 *psmap,
				   const u32 **map)
{
	const struct cv1800_pin *pin = sophgo_to_cv1800_pin(sp);
	enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
	u32 pstate = psmap[pin->power_domain];

@@ -183,7 +187,7 @@ static int cv1812h_get_schmitt_map(struct cv1800_pin *pin, const u32 *psmap,
	return -ENOTSUPP;
}

static const struct cv1800_vddio_cfg_ops cv1812h_vddio_cfg_ops = {
static const struct sophgo_vddio_cfg_ops cv1812h_vddio_cfg_ops = {
	.get_pull_up		= cv1812h_get_pull_up,
	.get_pull_down		= cv1812h_get_pull_down,
	.get_oc_map		= cv1812h_get_oc_map,
@@ -742,13 +746,18 @@ static const struct cv1800_pin cv1812h_pin_data[ARRAY_SIZE(cv1812h_pins)] = {
			   CV1800_PINCONF_AREA_RTC, 0x028),
};

static const struct cv1800_pinctrl_data cv1812h_pindata = {
static const struct sophgo_pinctrl_data cv1812h_pindata = {
	.pins		= cv1812h_pins,
	.pindata	= cv1812h_pin_data,
	.pdnames	= cv1812h_power_domain_desc,
	.vddio_ops	= &cv1812h_vddio_cfg_ops,
	.cfg_ops	= &cv1800_cfg_ops,
	.pctl_ops	= &cv1800_pctrl_ops,
	.pmx_ops	= &cv1800_pmx_ops,
	.pconf_ops	= &cv1800_pconf_ops,
	.npins		= ARRAY_SIZE(cv1812h_pins),
	.npd		= ARRAY_SIZE(cv1812h_power_domain_desc),
	.npds		= ARRAY_SIZE(cv1812h_power_domain_desc),
	.pinsize	= sizeof(struct cv1800_pin),
};

static const struct of_device_id cv1812h_pinctrl_ids[] = {
@@ -758,7 +767,7 @@ static const struct of_device_id cv1812h_pinctrl_ids[] = {
MODULE_DEVICE_TABLE(of, cv1812h_pinctrl_ids);

static struct platform_driver cv1812h_pinctrl_driver = {
	.probe	= cv1800_pinctrl_probe,
	.probe	= sophgo_pinctrl_probe,
	.driver	= {
		.name			= "cv1812h-pinctrl",
		.suppress_bind_attrs	= true,
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