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Allow toggling other bits in MSR_IA32_RTIT_CTL if the enable bit is being cleared, the existing logic simply ignores the enable bit. E.g. KVM will incorrectly reject a write of '0' to stop tracing. Fixes: bf8c55d8 ("KVM: x86: Implement Intel PT MSRs read/write emulation") Signed-off-by:Adrian Hunter <adrian.hunter@intel.com> [sean: rework changelog, drop stable@] Reviewed-by:
Xiaoyao Li <xiaoyao.li@intel.com> Link: https://lore.kernel.org/r/20241101185031.1799556-3-seanjc@google.com Signed-off-by:
Sean Christopherson <seanjc@google.com>