Commit fe56c674 authored by Wenmeng Liu's avatar Wenmeng Liu Committed by Hans Verkuil
Browse files

media: qcom: camss: Fix csid clock configuration for sa8775p 



Fix the mismatch between clock list and clock rate table for CSID lite
instances. The current implementation has 5 clocks defined but only 2
are actually needed (vfe_lite_csid and vfe_lite_cphy_rx), while the
clock rate table doesn't match this configuration.

Update both clock list and rate table to maintain consistency:
- Remove unused clocks: cpas_vfe_lite, vfe_lite_ahb, vfe_lite
- Update clock rate table to match the remaining two clocks

Signed-off-by: default avatarWenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Reviewed-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Fixes: ed03e99d ("media: qcom: camss: Add support for CSID 690")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarBryan O'Donoghue <bod@kernel.org>
Signed-off-by: default avatarHans Verkuil <hverkuil+cisco@kernel.org>
parent dd1b3739

drivers/media/platform/qcom/camss/camss.c

+15 −25
Original line number Diff line number Diff line
@@ -3598,12 +3598,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = { 
	/* CSID2 (lite) */

	{

		.regulators = {},

		.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

			   "vfe_lite_csid", "vfe_lite_cphy_rx",

			   "vfe_lite"},

		.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },

		.clock_rate = {

			{ 0, 0, 400000000, 400000000, 0},

			{ 0, 0, 400000000, 480000000, 0}

			{ 400000000, 480000000 },

			{ 400000000, 480000000 }

		},

		.reg = { "csid_lite0" },

		.interrupt = { "csid_lite0" },
@@ -3617,12 +3615,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = { 
	/* CSID3 (lite) */

	{

		.regulators = {},

		.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

			   "vfe_lite_csid", "vfe_lite_cphy_rx",

			   "vfe_lite"},

		.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },

		.clock_rate = {

			{ 0, 0, 400000000, 400000000, 0},

			{ 0, 0, 400000000, 480000000, 0}

			{ 400000000, 480000000 },

			{ 400000000, 480000000 }

		},

		.reg = { "csid_lite1" },

		.interrupt = { "csid_lite1" },
@@ -3636,12 +3632,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = { 
	/* CSID4 (lite) */

	{

		.regulators = {},

		.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

			   "vfe_lite_csid", "vfe_lite_cphy_rx",

			   "vfe_lite"},

		.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },

		.clock_rate = {

			{ 0, 0, 400000000, 400000000, 0},

			{ 0, 0, 400000000, 480000000, 0}

			{ 400000000, 480000000 },

			{ 400000000, 480000000 }

		},

		.reg = { "csid_lite2" },

		.interrupt = { "csid_lite2" },
@@ -3655,12 +3649,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = { 
	/* CSID5 (lite) */

	{

		.regulators = {},

		.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

			   "vfe_lite_csid", "vfe_lite_cphy_rx",

			   "vfe_lite"},

		.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },

		.clock_rate = {

			{ 0, 0, 400000000, 400000000, 0},

			{ 0, 0, 400000000, 480000000, 0}

			{ 400000000, 480000000 },

			{ 400000000, 480000000 }

		},

		.reg = { "csid_lite3" },

		.interrupt = { "csid_lite3" },
@@ -3674,12 +3666,10 @@ static const struct camss_subdev_resources csid_res_8775p[] = { 
	/* CSID6 (lite) */

	{

		.regulators = {},

		.clock = { "cpas_vfe_lite", "vfe_lite_ahb",

			   "vfe_lite_csid", "vfe_lite_cphy_rx",

			   "vfe_lite"},

		.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },

		.clock_rate = {

			{ 0, 0, 400000000, 400000000, 0},

			{ 0, 0, 400000000, 480000000, 0}

			{ 400000000, 480000000 },

			{ 400000000, 480000000 }

		},

		.reg = { "csid_lite4" },

		.interrupt = { "csid_lite4" },