Commit fec05adc authored by Alvin Lee's avatar Alvin Lee Committed by Alex Deucher
Browse files

drm/amd/display: Use channel_width = 2 for vram table 3.0



VBIOS has suggested to use channel_width=2 for any ASIC that uses vram
info 3.0. This is because channel_width in the vram table no longer
represents the memory width

Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: default avatarSamson Tam <samson.tam@amd.com>
Acked-by: default avatarRodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d6a57588
Loading
Loading
Loading
Loading
+7 −1
Original line number Diff line number Diff line
@@ -2386,7 +2386,13 @@ static enum bp_result get_vram_info_v30(
		return BP_RESULT_BADBIOSTABLE;

	info->num_chans = info_v30->channel_num;
	info->dram_channel_width_bytes = (1 << info_v30->channel_width) / 8;
	/* As suggested by VBIOS we should always use
	 * dram_channel_width_bytes = 2 when using VRAM
	 * table version 3.0. This is because the channel_width
	 * param in the VRAM info table is changed in 7000 series and
	 * no longer represents the memory channel width.
	 */
	info->dram_channel_width_bytes = 2;

	return result;
}