Commit fed15196 authored by Tengfei Fan's avatar Tengfei Fan Committed by Bjorn Andersson
Browse files

soc: qcom: llcc: Add llcc configuration support for the SA8775p platform



Add llcc configuration support for the SA8775p platform.

Signed-off-by: default avatarTengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240529101534.3166507-3-quic_tengfan@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent f5dbad39
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+35 −0
Original line number Diff line number Diff line
@@ -150,6 +150,25 @@ enum llcc_reg_offset {
	LLCC_COMMON_STATUS0,
};

static const struct llcc_slice_config sa8775p_data[] =  {
	{LLCC_CPUSS,    1, 2048, 1, 0, 0x00FF, 0x0, 0, 0, 0, 1, 1, 0, 0},
	{LLCC_VIDSC0,   2, 512, 3, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_CPUSS1,   3, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_CPUHWT,   5, 512, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_AUDIO,    6, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 0, 0, 0},
	{LLCC_CMPT,     10, 4096, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_GPUHTW,   11, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_GPU,      12, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 1, 0},
	{LLCC_MMUHWT,   13, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 1, 0, 0},
	{LLCC_CMPTDMA,  15, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_DISP,     16, 4096, 2, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_VIDFW,    17, 3072, 1, 0, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_AUDHW,    22, 1024, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 0, 0, 0},
	{LLCC_CVP,      28, 256, 3, 1, 0x00FF, 0x0, 0, 0, 0, 1, 0, 0, 0},
	{LLCC_APTCM,    30, 1024, 3, 1, 0x0, 0xF0, 1, 0, 0, 1, 0, 0, 0},
	{LLCC_WRCACHE,    31, 512, 1, 1, 0x00FF, 0x0, 0, 0, 0, 0, 1, 0, 0},
};

static const struct llcc_slice_config sc7180_data[] =  {
	{ LLCC_CPUSS,    1,  256, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 1 },
	{ LLCC_MDM,      8,  128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 },
@@ -552,6 +571,16 @@ static const struct qcom_llcc_config qdu1000_cfg[] = {
	},
};

static const struct qcom_llcc_config sa8775p_cfg[] = {
	{
		.sct_data	= sa8775p_data,
		.size		= ARRAY_SIZE(sa8775p_data),
		.need_llcc_cfg	= true,
		.reg_offset	= llcc_v2_1_reg_offset,
		.edac_reg_offset = &llcc_v2_1_edac_reg_offset,
	},
};

static const struct qcom_llcc_config sc7180_cfg[] = {
	{
		.sct_data	= sc7180_data,
@@ -698,6 +727,11 @@ static const struct qcom_sct_config qdu1000_cfgs = {
	.num_config	= ARRAY_SIZE(qdu1000_cfg),
};

static const struct qcom_sct_config sa8775p_cfgs = {
	.llcc_config	= sa8775p_cfg,
	.num_config	= ARRAY_SIZE(sa8775p_cfg),
};

static const struct qcom_sct_config sc7180_cfgs = {
	.llcc_config	= sc7180_cfg,
	.num_config	= ARRAY_SIZE(sc7180_cfg),
@@ -1332,6 +1366,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)

static const struct of_device_id qcom_llcc_of_match[] = {
	{ .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
	{ .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
	{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
	{ .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
	{ .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },