Commit ff0e4d4c authored by Jamie Iles's avatar Jamie Iles Committed by Jassi Brar
Browse files

mailbox: pcc: don't zero error register 



The error status mask for a type 3/4 subspace is used for reading the
error status, and the bitwise inverse is used for clearing the error
with the intent being to preserve any of the non-error bits.  However,
we were previously applying the mask to extract the status and then
applying the inverse to the result which ended up clearing all bits.

Instead, store the inverse mask in the preserve mask and then use that
on the original value read from the error status so that only the error
is cleared.

Fixes: c45ded7e ("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)")
Signed-off-by: default avatarJamie Iles <jamie.iles@oss.qualcomm.com>
Signed-off-by: default avatarPunit Agrawal <punit.agrawal@oss.qualcomm.com>
Signed-off-by: default avatarJassi Brar <jassisinghbrar@gmail.com>
parent 094b53ec

drivers/mailbox/pcc.c

+4 −4
Original line number Diff line number Diff line
@@ -276,9 +276,8 @@ static int pcc_mbox_error_check_and_clear(struct pcc_chan_info *pchan) 
	if (ret)

		return ret;



	val &= pchan->error.status_mask;

	if (val) {

		val &= ~pchan->error.status_mask;

	if (val & pchan->error.status_mask) {

		val &= pchan->error.preserve_mask;

		pcc_chan_reg_write(&pchan->error, val);

		return -EIO;

	}
@@ -745,7 +744,8 @@ static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan, 


		ret = pcc_chan_reg_init(&pchan->error,

					&pcct_ext->error_status_register,

					0, 0, pcct_ext->error_status_mask,

					~pcct_ext->error_status_mask, 0,

					pcct_ext->error_status_mask,

					"Error Status");

	}

	return ret;